1. Microprocessors

2. Overview In this chapter, you will learn how to – Identify the core components of a CPU – Describe the relationships of CPUs and RAM – Explain the varieties of modern CPUs

3. Microprocessor Microprocessor or Central Processing Unit (CPU) is a complete computation engine that is fabricated on a single chip with highly complex, extensive set of electronic circuitry that executes stored program instructions. CPU (Central Processing Unit) works as very powerful calculator. CPU’s are not very smart…just very fast at manipulating 0s and 1s

4. Microprocessor A microprocessor executes a collection of machine instructions that tell the processor what to do.. Based on the instructions, a microprocessor does three basic things: – Use its ALU (Arithmetic/Logic Unit): to execute mathematical operations.. – A microprocessor can move data from one memory location to another. – A microprocessor can make branch and conditional jump

5. Microprocessor CPU has two typical components : 1.The Arithmetic Logic Unit (ALU), which performs arithmetic and logical operations. 2.The Control Unit (CU), which extracts instructions from memory and decodes and executes them, calling on the ALU when necessary.

6. Man in the Box Visualize the CPU as a man in a box. – He will gladly perform anything you want him to, but he can’t see or hear anything outside the box. – How can we communicate with him? We need some way to talk to the guy inside the box Is anyone out there?

7. Talking to the Man Imagine Imagine 16 lights – – 8 on the inside and 8 on the outside – When an inside light is on, the corresponding outside light is on. We can switch these lights on and off. – This communication system is like the external data bus OffOn Inside the CPU Outside the CPU

8. Talking to the Man reality In reality there are a lot of little wires that flash on or off – Voltage is applied or not – Represented not as on, on, off, off… but as 1, 1, 0, 0… On 1 Off 0 On 1 Off 0 On 1 Off 0 On 1 1

9. How does the CPU work? Each instruction takes a machine cycle Computers have a clock Instruction Set: Each CPU executes a specific set of instruc tions Control Unit Arithmetic/ Logic Unit Memory 1. Fetch 2. Decode3. Execute 4. Store

10. How does the CPU work?

11. Bus interconnection A bus is a communication pathway(s) connecting 2 or more devices. It is a shared transmission medium. System bus: A bus that connects major computer components A system bus consists of many (>100) lines. The lines can be classified into 3 functional group: data, address and control lines

12. Bus interconnection The address bus transports memory addresses which the processor wants to access in order to read or write data. It is a unidirectional bus. The data bus transfers instructions coming from or going to the processor. It is a bidirectional bus. The control bus transports orders and signals coming from the control unit and travelling to all other hardware components.

13. External Data Bus The external data bus (EDB) is the way the CPU communicates with the outside world – Instead of light bulbs the external data bus (EDB) is made up of tiny wires – The state of a wire is expressed in a binary format, with 0s and 1s – Each discrete setting (series of 0s and 1s representing the state of the wires) of the external data bus is a line of code in a program

14. External Data Bus RAM External Data Bus Why we need MCC?

15. External Data Bus MCC – The memory controller chip (MCC) is a device that facilitates the flow of data from the RAM to the CPU – Memory controller chip gets data from RAM and puts it on the external data bus for the CPU to process – CPU can tell the MCC – on address bus- which line of RAM it wants

16. External Data Bus – Address bus size determines the max amount of RAM a CPU can handle 8088 used 20 wires = 2 ^20 or 1,048,576 bytes (1 M) Address space – Exercise: the definition of kilo, mega and giga and the difference between KB and kb page 67- 68

17. Codebook The man in the box needs one more tool: the codebook or instruction set – Called machine language – One command is a line of code – The complete set of commands for a processor is its instruction set InstructionMeaning 1000 0000Store next line in AX 1001 0000Store next line in BX 1011 0000Add AX to BX & store in AX 1100 0000Place AX on EDB

18. Codebook (Instruction Set) InstructionMeaning 1000 0000Store next line in AX 1001 0000Store next line in BX 1011 0000Add AX to BX & store in AX 1100 0000Place AX on EDB 1000 0000Instruction (store data in AX) 0000 0001Data (number 1) 1001 0000Instruction (store data in BX) 0000 0010Data (number 2) 1011 0000Instruction (add AX and BX and place in AX) 1100 0000Place AX on EDB

19. Registers  Registers are:  temporary storage locations for instructions or data  not parts of memory, but parts of CPU  very fast  under the control of the control unit  and they  accept, hold, transfer instructions or data  hold data about immediate operation being executed, as compared to the memory that holds data about near future.  size of address bus, external data bus, CPU registers, and RAM has grown greatly since the 8088

20. Registers  Inside the box are registers (temporary storage locations)  The four general purpose registers found in all CPUs are AX, BX, CX, and DX 10000101 00110101 11001001 10100001 AX BX CX DX

21. Clock The CPU does no work until told to – even though data may be on the EDB You need a buzzer to tell the guy to start – This is referred to as a clock – A clock is actually a stream of pulses z 10000101 00110101 Time to work 10000101 00110101

22. Clock A clock cycle is the time taken by the special wire to charge up. CLK wire is a special wire on real CPU. A charge on the CLK wire tells the CPU there is another piece of information waiting to be processed. – A cycle is one complete up and down segment of the sine wave CPU Clock speed: the maximum number of clock cycles that a CPU can handle per second (measured in Hertz) CPU can run at any speed slower or equal to its clock speed – Ex: Intel 8088 has speed of 4.77 MHz (4.77 million of cycles per second)

23. Clock CPU requires at least two clock cycles to act on a command and usually more. CPU may require hundreds of clock cycles to process some commands.

24. Clock The system crystal determines the speed at which a CPU and rest of PC operate (called system bus speed) The system crystal is a quartz oscillator soldered to motherboard. It sends out an electric pulse at a certain speed. This signal goes first to a clock chip that adjusts the pulse (usually increasing the pulse sent by some large multiple) i.e. the quartz oscillator, through the clock chip, fires a charge on the CLK wire of CPU CPU Clock speed = frequency of oscillator * multiply of clock chip

25. Clock System Crystal

26. Clock Should not run CPU above its clock speed – Underclocking is running CPU slower than its clock speed – Overclocking is running CPU faster than clock speed (it can overheat and stop working)

27. Clock Speed and Multiplier Early : clock chip pushed every chip on motherboard, not just CPU Clock-multiplying CPU: developed to make CPUs run faster than the rest of computer. It takes the incoming clock signal and multiplies it inside CPU Allows the internal CPU operations to run at a multiple of the clock speed used for the external bus transactions (memory reads, writes, …) The secret to making multiplying work is caching

28. Clock Speed and Multiplier Multipliers run from 2× up to almost 30 × Ex: multiplier of 6.5 ×, 7 ×, Ex: Intel Pentium 4 3.06 GHz: CPU runs at external speed of 133 MHz with a 23* multiplier to make 3.06 GHz It is inaccurate to compare CPUs based on only clock speed. Other factors include: caching, pipelining, ….

29. Example A Pentium motherboard has 64-bit data bus and speed of 300 MHZ and a 3.5X CPU with a label speed of 800 Mhz. Calculate the following? – Speed of CPU:………… 300X3.5= 1050 MHZ……………… – Is CPU under clocking or over clocking: …… Over Clocking……………. – Internal speed of CPU ……………1050 MHZ…………….. – External speed of CPU……………300 MHz as Motherboard speed………………

30. CPU Voltages Transistors like any other electrical device, require a set voltage to run properly Early: CPUs ran on 5 volts, just like every other circuit on motherboard Pentium require only 3.3 v All logic circuits still ran at 5 volts, so manufacturers installed a voltage regulator module.  Voltage Regulator Module (VRM) is a small card that enables a CPU to standardize voltage regulators (now VRM is built-in) Why?

31. VRM

32. Pipelined Instructions  5 steps are required to execute instruction: fetch – decode – load - execute – write  Pipelining is the process of processing more than one command at a time through the use of separate sets of circuitry  Instruction execution is “pipelined” : Execution of instructions overlap, so that when one instruction is being executed, the next instruction loads it data, and the one after that is being decoded.  If there are five clock cycles to execute each instruction ▪ there can be five instructions in various stages of execution simultaneously. That way it looks like one instruction completes every clock cycle.

33. Pipelined Instructions

34. Pipelines kept getting longer, reaching up to 20 stages Exercise: define pipeline stall

35. Pipelined Instructions Many modern processors have multiple pipeline. – This allows for multiple instruction streams, which means that more than one instruction can complete during each clock cycle. Require multiple copies of the circuitry in the CPU, several instructions may even be “issued” (scheduled to execute) at the same time.

36. Concurrent Instructions

37. Cache Memory External memory (RAM) is much larger than cache but takes about 100 - 300 CPU clock cycles to access External memory has its own clock, which in 2006 is about 667 MHz, much slower than the CPU clock. To decrease the delay in external memory access, the CPU “caches” (keeps a copy of) recently used memory. The memory in the CPU used for the cache (static RAM- SRAM) is faster, but requires more transistors and is more expensive to build than the external memory (dynamic RAM- DRAM).

38. Cache Memory Cache exists between two subsystems to access data more quickly to increase performance. Performance is increased because the cache is usually faster than RAM and does not have to cross an additional bus. Cache is typically used for reads, but it is increasingly being used for writes as well. Internal Cache: built into the processor External Cache: built on separate chips

39. Cache Memory For new CPUs – At least two levels of cache stored inside CPU housing on a memory chip that sits close to the CPU microchip – Level 1 cache: The smallest and fastest cache is about 56 KBytes in size and takes about 2 CPU clock cycles to access. – Level 2 cache: is about 512 KBytes - 2 MByte in size, and takes about 6-10 clock cycles to access, if part of the CPU. CPU tries L1 cache first then L2 – Some CPUs even have a level 3 cache (around 8MBytes). For older CPUs – Stored on the system board either in individual chips or on memory modules called COAST (cache on a stick)

40. In Summary The Man in the Box is the CPU The external data bus gets data in and out of the CPU Registers are used as temporary storage in inside the CPU The codebook is the instruction set The clock defines the speed 10000101 00110101 11001001 10100001

41. Manufacturers Two main CPU makers – Intel – AMD CPUS might look similar, but are not interchangeable

42. CPU packages Package defines how CPU looks physically and how it is connected to comp DIPP (dual inline pin package) – 8088, 8086,..

43. CPU packages  SECC (Single Edge Contact Cartridge)  They stand on the edge so the CPU takes less space on the motherboard and can be easily cooled  Mounts vertically  Inserted in Slot 1 connector

44. CPU packages PGA (pin grid array) – Pins are evenly distributed along the bottom of the chip – 80286, 80386, 486

45. CPU packages SPGA (staggered pin grid array) – Pentium, K5, K6, 6x86, P6 Pins organized in a diagonal pattern Have special ZIF socket which makes CPU insertion and removal easier. It has a small lever on the side of the socket that lifts the CPU up and out of the socket

46. CPU slots and sockets The physical connection used to connect the CPU to the system board Slots 1 and 2 are proprietary Intel slots Slot A is a proprietary AMD slot Current CPU sockets are zero insertion force (ZIF) sockets

47. Sockets The CPU socket types change because: – Advances in CPU technology (large address, data buses) require increased number of pins – Increased clock speed of the CPU requires improvements in sockets to provide higher bandwidth – Faster CPU’s generate more heat and require more cooling methods

48. Socket comparisons

49. 32-bit Processing

50. CPU Overview There are several specification used to describe and compare CPUs: – Make (Intel, AMD) – Model (Pentium, Athlon, etc.) – Packages or how it’s mounted (PGA, SEC, SEP) – External speed (speed of crystal) – Multiplier (applied to crystal) – Cache (L1 and L2) – Internal speed (speed when crystal multiplied) – Pipelining – HyperThreading We’ll cover these in older and newer CPUs

51. Pentium class CPU External speed range 50-66 MHz Internal speed range 60-200 MHz Multiplier range: 1× - 3 × L1 cache : 16KB Package: PGA Socket(s): Socket4, socket 5

52. Pentium Pro (P6) in 1995 First Pentium to offer Level 2 cache inside CPU housing (on- chip L2 cache) Quad pipelining, dynamic processing External speed range 60-66 MHz Internal speed range 166-200 MHz Multiplier range: 2.5× - 3× L1 cache : 16KB L2 cache: 256KB, 512 KB, 1 MB Package: PGA Socket(s): Socket 8 Intel never really developed the P6 for most users. It was to be the CPU for powerful, higher end system.

53. Improvements On-Chip L2 Cache – On the same package, but not necessarily on the same chip

54. Bus Types Frontside bus – Address bus and external data bus are combined together between the CPU, MCC, and RAM Backside bus – Connection between the CPU and L2 cache Remember that L2 cache used to be external cache but is now internal to the CPU housing CPU L2 Cache RAM MCC Frontside bus Backside bus

55. Pentium MMX (Multimedia Extension) 1996 Speeds up graphical applications External speed range 66-75 MHz Internal speed range 166-200 MHz Multiplier range: 2.5× - 4.5× L1 cache : 32KB Package: PGA Socket(s): Socket 7

56. Pentium II First Pentium to use a slot instead of a socket that gave more space or L2 and made cooling easier External speed range 66-100 MHz Internal speed range 233-450 MHz Multiplier range: 3.5× - 4.5× L1 cache : 32KB L2 cache: 512KB Package: SECC Socket(s): Slot 1 continued

57. Intel Celeron processors Term Celeron describes a series of lower-end processor around Pentium II, III, and 4 Celeron CPU’s cheap price made it a huge success in marketplace External speed range 66 MHz Internal speed range 266-700 MHz Multiplier range: 4× - 10.5× L1 cache : 32 KB L2 cache : non in first version, then 128 KB Package: SEP, PGA Socket(s): slot 1, Socket 370

58. Intel Xeon processors Term Xeon define a series of high-end processors built around Pentium II, III, 4 Massive L2 cache Strong multiprocessor support designed exclusively for powerful servers Supports up to eight processors in one computer

59. Intel Xeon processors

60. Pentium III Introduced Intel’s new performance enhancement called SSE (streaming SIMD Extensions), a new instruction set designed to improve multimedia processing even further A number of internal processing / pipelining improvements High speed L2 cache.

61. Pentium III External speed range 100-133 MHz Internal speed range 450 MHz- 1.26 GHz Multiplier range: 4× - 10× L1 cache : 32KB L2 cache: 256 or 512KB Package: SEC-2, PGA Socket(s): Slot 1, socket 370

62. Pentium 4 Introduced a completely redesigned core, called Netburst Netburst: new 20-stage pipeline  crank up clock speed New versions of SSE : SSE2 SSE3 400 MHz frontside bus speed using 4 data transfer per clock cycle on a 100-MHz bus (quad- pumped frontside bus technology)

63. Pentium 4 (next generation) Hyper-Threading: each individual pipeline can run more than one thread at a time. Such CPU looks like 2 CPUs to operating system

64. Pentium 4 (next generation) External speed range 100, 133, 200 MHz (quad pump) Internal speed range 1.3 GHz – 3.8 GHz Multiplier range: 13× - 23× L1 cache : 128 KB L2 cache: 256 or 512 KB Package: 478-pin PGA, 775-pin LGA Socket(s): socket 478, socket LGA 775

65. Pentium 4 (extreme edition) External speed range 200, 266 MHz (quad pump) Internal speed range 3.2 GHz – 3.7 GHz Multiplier range: 14× - 17× L1 cache : 128 KB L2 cache: 512 K L3 cache: 2 MB Package: 478-pin PGA, 775-pin LGA Socket(s): socket 478, socket LGA 775

66. Mobile Processor Virtually every CPU made by Intel has come in a mobile version Ex: mobile Intel Pentium III, Intel Pentium M (M for Mobile), Intel Core Duo Less power Lower speed (75% of same desktop) Marketing term Centrino used by Intel to define mobile solution including processor, support chip, and wireless networking

67. Mobile Processor Tape Carrier Package (TCP), CPU without packaging

68. 64-bit CPUs A 64-bit CPU has general purpose, floating point and address registers that are 64-bits wide. Can address 2 64 bytes of memory or 16 EB (exabyte) No 64-bit CPU uses actual 64-bit address bus Ex: Itanium, Itanium2

69. Intel Itanium2 – Frontside bus width 128 bit – External speed 100 MHz (quad-pumped) – Internal Speed 900 MHz, 1GHz – multiplier: 9* - 10 – L1: 32KB, L2: 256KB, L3: 1.5, 3MB – Package: OLGA - socket: socket 611 – Not backward compatible to 32-bit programming

70. Dual-Core CPUs Combine two CPUs into a single chip Two execution units- two sets of pipelines that share caches and RAM

71. Intel Pentuim D – Intel Pentuim D: 2 Pentium 4s(32-bit), each its own cache – share same frontside bus – External speed 166, 200 MHz – Internal Speed 2.6 – 3.6 GHz – multiplier: 14×- 20× – L1: two 128KB, L2: two 1 MB or two 2 MB – Package: 775-pin LGA – socket: socket 775

72. Intel Core- Goodbye, Pentium Intel signaled the end of the Pentium name in 2006 Based on the Pentium M platform, Core uses 12-stage pipeline Come in single-(Solo) and dual-core (Duo) versions Intel Core: – External speed 133 MHz, 166MHz – Internal speed range 1.06 GHz -2.33 GHz – L1 cache one (Core Solo) or two (Core Duo) 32-KB caches – L2 cache: One 2048-KB cache Intel Core 2: – Based on Core architecture – External speed 266MHz – Internal speed range 1.8 GHz-3.2 GHz – L1 cache two 64-KB caches – L2 cache: One 2048-KB cache or 4096 KB

73. Cooling Faster CPUs run hotter than slower on If you replace your old CPU with a new one, a new fan is needed. Your case fan may not be sufficient, causing CPU to overheat and system lock up Adding improved cooling can be done but may require a new case