1. BLM FOR THE INJECTORS PROJECT LINAC4 & PSB Beam Instrumentation Review – 18/10/2011 Christos Zamantzas (christos.zamantzas@cern.ch)

2. Introduction This project has undertaken the task to develop up-to-date Beam Loss Monitoring Systems for the Injectors. Mainly, Build a generic, highly configurable and high-performing system Acquisition part to accept any monitor type Use reprogrammable parts to target all injectors’ requirements Team members: BI/BL: M. Alsdorf, B. Dehning, E. Effinger, J. Emery, G. Venturini, W. Vigano, C. Zamantzas BI/SW: S. Jackson, L. Jensen christos.zamantzas@cern.ch2BI LINAC4 Review – 18/10/2011

3. Outline Specifications System overview Installation overview Budget estimations Production Planning christos.zamantzas@cern.ch3BI LINAC4 Review – 18/10/2011

4. SPECIFICATIONS

5. General Information Useful information on the LINAC4 and PSB requirements can be found in the following links: Beam Interlock Specifications for LINAC4, Transfer Lines and PS Booster with LINAC4 [https://edms.cern.ch/document/1016233/0.3]https://edms.cern.ch/document/1016233/0.3 Notes on the Beam Loss Monitoring System for LINAC4 and PSB [link]link  Description of all important info, specific implementations, etc  Documents under preparation.  Meeting notes Summary table of requirements [link]link  Result from discussions the BL and SW sections had with OP christos.zamantzas@cern.ch5BI LINAC4 Review – 18/10/2011

6. Acquisition & Processing Synchronisation of acquisitions is required with the start of the cycle to  Perform calculation of integration periods and  Schedule comparisons with their corresponding threshold values. Synchronisation to be achieved by  Use an event received through the timing system.  Dedicated timing card with broadcast in the backplane.  Sync will be done at the processing level (i.e. 2 samples jitter between cards). Up to 4 integration periods:  2  s, 400  s, 1 ms and 1.2 s (full cycle)  Log maximum values recorded for each in the cycle  Log 1.2 s value for ambient radiation measurement christos.zamantzas@cern.ch6BI LINAC4 Review – 18/10/2011

7. Threshold Comparisons The threshold values will need to be unique per channel:  Each card will process 8 channels The threshold values will need to be unique per user:  The information of the current user has to be obtained from the telegram per cycle -> dedicated timing card  Memory for 32 users should be reserved. Two integration periods, 2  s and 1.2 s, will be checked against their threshold values:  2 threshold values, one for each of the integration periods.  In the case the measured values exceed those the beam permit signal will be removed for all users and until operator acknowledges. Two integration periods will be checked for repeated over threshold function (might be implemented in SW)  An additional 2 threshold values for the same integration periods (i.e. 2  s and 1.2 s) will also be required.  In the case they are found to over threshold repeatedly n times it will be required to block this user’s injections only until operator acknowledges.  The repeat value n will be settable per monitor in the range of 1 to 16. christos.zamantzas@cern.ch7BI LINAC4 Review – 18/10/2011

8. Beam Permit Logic System has to block injections  i.e. “remove permit” if losses over threshold System has to remember if the user is allowed to have beam  i.e. “give permit” if previous cycle for the user was ok (or errors cleared) The Beam Interlock Controller will be configured in the “Non-latch” mode.  i.e. the BLM system will need to follow timing and notify in advance. The maximum latency (from measurement to output) should be kept as small as possible.  The target for the first integration period is ~ 5 μs. Only data from the current cycle need to be considered.  Timing in the electronics essential (i.e. possible failure mode) christos.zamantzas@cern.ch8BI LINAC4 Review – 18/10/2011

9. Online display & Capture functions christos.zamantzas@cern.ch9 2748751200 0 Time [ms] C0 Cycle n 275 LINAC4 2 μs samples 274 Cycle n+1 Tx windowAcq. window Adjustable 1 ms window of 2μs samples1 ms samples PSB BI LINAC4 Review – 18/10/2011

10. SYSTEM OVERVIEW

11. System Architecture christos.zamantzas@cern.ch11BI LINAC4 Review – 18/10/2011

12. Acquisition Crate 12 3D model of the Acquisition Crate Acquisition cards (BLEDP) Main panel LEDs Power switch Ref. Input Control Unit Later version w/ advanced remote functions by William Vigano christos.zamantzas@cern.chBI LINAC4 Review – 18/10/2011

13. Acquisition principle (ACFC & DADC) The input channel circuit is able to measure current input from 10pA to 200mA. The measurement of the current input is performed by two different techniques: 1)Advanced Current to Frequency Converter (ACFC) used in the range 10pA to 30mA 2)Direct ADC acquisition (DADC) used in the range 20.3µA to 200mA 13 No gain change required: The switch between the 2 ranges is managed by the FPGA. If the maximum ACFC counts is reached, the FPGA switches the circuit to the DADC mode. When the value of the DADC falls below a threshold, the FPGA switches the circuit to the ACFC mode. by William Vigano christos.zamantzas@cern.chBI LINAC4 Review – 18/10/2011

14. INSTALLATION OVERVIEW

15. Cable choices overview Details: Coaxial (double shielded): CKB50CKB50 HV cable: CBH50CBH50 Connectors (custom-made): prototype received. Adaptors (custom-made): specifications given christos.zamantzas@cern.ch15 Machine # ch Signal cable HV cable Cable tray spare cables Comments LINAC4 30 Coaxial (double shielded) singleyes installation started; PSB 48 Coaxial (double shielded) 6 ch in seriesno?new cables required PS 109 Coaxial (double shielded) 6 ch in seriesno?new cables required BI LINAC4 Review – 18/10/2011

16. LINAC4 cabling christos.zamantzas@cern.ch16 Signal input (CFC) Ionization Chamber HV Supply 1500V HV BNC CKB 50BNC External Screen 2 Internal Screen 1  External screen to shield high frequency noise.  Internal screen to shield low frequency noise (GND only on electronic side, IC is floating).  Screen of HV BNC is open on the IC side to assure there is no ground loop.  CKB 50 up to 200m, BNC up to 2m by Ewald Effinger Note: most probably will use the same for PS and PSB enclosed in cable traytube BI LINAC4 Review – 18/10/2011

17. BUDGET ESTIMATIONS

18. Summary of budget needed christos.zamantzas@cern.ch18 EstimateBudget *diff LINAC4150,200133,000-17,200 PSB161,324 250,000 -161,324 PS443,152-193,152 TOTAL754,676383,000-327,676 * Budget value for LINAC4 is from last EVM * Budget values for PSB and PS are taken from the Injector Consolidation document, which does not include cabling;Injector Consolidation Note: Latest version of the calculations can be found at: https://espace.cern.ch/project-blm-inj/Shared%20Documents/Budget.xlsx  LINAC4 calculation still close on estimate  First estimate with new cables on PS (100m) and PSB (60m)  Detectors assumed Ionisation Chambers and taken from the LHC spares BI LINAC4 Review – 18/10/2011

19. LINAC4 budget estimate christos.zamantzas@cern.ch19BI LINAC4 Review – 18/10/2011 InstallationSpare Estimated Prices:CHFunitstotal priceunitstotal priceGeneral Comments Point Specific Comments Monitor IC150030010 LINAC4 will take from LHC spares SEM000 ACEM000 LINAC4 specs have a request - not clear yet on numbers LIC0 0 0 Module Carrier (prototype)0 0 0 will re-use standard carrier Mezzanine (prototype)400000.14000 0 new development; will be split between projects Carrier (production)250000 VME64x re-production Mezzanine (production)40000 Processing290051450025800 not including protyping costs prototype600000.1600000 new development; will be split between projects production150000 price per card to produce Mezzanine30000 assuming gigabit link Acquisition18005900023600 not including protyping costs Combiner & Survey20002400012000 needs re-productionsecond CS for controlling the extra HV Acquisition crate chassis500 0 0 backplane100000 power supply30000 Complete crate18001 00 Processing crate Complete crate (renovation)1000000 In the renovations the CPU is paid by CO cpu300000 Complete crate (new construction) 130001 00 In a new construction need to add the CPU costLinac4 in considered a new construction Rack124001 00 Installation signal cable2030006000000 price per metre for double shielded coaxialLINAC4 single cable per monitor (30*100m) HV cable51500750000 price per metre HV power supply11004440022200 (730 Euro) should add as many as possible for better measurements Cable patch & Signal boxes2080000 Cabling and boxes for 1 BLM: HV cabling: Plug 2 * 33.0CHF/p ; cable 1CHF/m * 10 m -> total = 76CHF/ cable BNC cabling: Plug 2 * 16CHF/p ; cable 1CHF/m * 10 m -> total = 42CHF/ cable Box: 45 CHF/p; HV Socket 3 * 11.0CHF/p ; BNC Socket 2*6CHF/p -> 90CHF/P 208CHF/BLM New cabling; no boxes are needed. CHF 136,600CHF 13,600 TOTALCHF 150,200

20. PSB budget estimate christos.zamantzas@cern.ch20BI LINAC4 Review – 18/10/2011 InstallationSpare Estimated Prices:CHFunitstotal priceunitstotal priceGeneral Comments Point Specific Comments Monitor IC150048010 Use LHC spares SEM000 ACEM000 LIC0 0 0 Module Carrier (prototype)0 0 0 will re-use standard carrier Mezzanine (prototype)400000.14000 0 new development; will be split between projects Carrier (production)250000 VME64x re-production Mezzanine (production)40000 Processing290082320025800 not including protyping costs prototype600000.1600000 new development; will be split between projects production150000 price per card to produce Mezzanine30000 assuming gigabit link Acquisition180081440023600 not including protyping costs Combiner & Survey20001 1 needs re-production Acquisition crate chassis500 0 0 backplane100000 power supply30000 Complete crate18001 1 Processing crate Complete crate (renovation)100001 0 In the renovations the CPU is paid by CO cpu300000 Complete crate (new construction) 13000000 In a new construction need to add the CPU cost Rack124001 00 Installation signal cable2028805760000 price per metre for double shielded coaxialdouble shielded per channel HV cable5480240000 price per metre8 cables needed HV power supply11002220011100 (730 Euro) should add as many as possible for better measurements Cable patch & Signal boxes20848998451040 Cabling and boxes for 1 BLM: HV cabling: Plug 2 * 33.0CHF/p ; cable 1CHF/m * 10 m -> total = 76CHF/ cable BNC cabling: Plug 2 * 16CHF/p ; cable 1CHF/m * 10 m -> total = 42CHF/ cable Box: 45 CHF/p; HV Socket 3 * 11.0CHF/p ; BNC Socket 2*6CHF/p -> 90CHF/P 208CHF/BLM CHF 145,984CHF 15,340 TOTALCHF 161,324

21. PRODUCTION PLANNING

22. PCB development 1.prototype of BLEDP (4 pcs)  Workshop started design on week 34 (mid August) 2.mount 2 PCB; analogue and digital checks in parallel  Expected mid November 3.develop basic functions in FPGA  Validate connections;  later will be part of the “diagnostics” firmware. 4.prototype backplane of acq. crate  Requested time in design office for mid October. 5.validation of the complete acquisition system  Will use SFP with gigabit Ethernet.  Support by BI/SW for diagnostic and expert application. 6.prototype mezzanine (if no re-iteration needed)  Requested time for mid November; Will be later  Most of the design is mirror of the digital part of the BLEDP board. christos.zamantzas@cern.ch22BI LINAC4 Review – 18/10/2011 -> Will receive end Oct. -> Could start end Oct. At the moment we are 3-4 weeks in advance of schedule !! -> On plan

23. FPGA & FESA Real-Time software Definition of the memory map  CPU in readout simulation mode  Start development of driver, RT software, etc.  First version of memory map (LINAC4) - end of September Develop VME block transfer  Needed for extracting all data requested  First version of (M)BLT – end of November Test-bench: VME crate with bare carrier boards  Intel CPU  Firmware with dummy vectors  Timing  First version of RT could start being implemented christos.zamantzas@cern.ch23BI LINAC4 Review – 18/10/2011 -> two weeks late -> on schedule

24. SUMMARY

25. Summarising No written and approved specifications  Continuous communication with OP – most details have been defined Reliable tunnel installation  Monitors will be Ionisation Chambers  High immunity to EMI with special cables, connectors and enclosed cabletrays High performance acquisition electronics  Automatic range selection  Dynamic range = 10 11  In system calibration mode Modular processing electronics  High availability of resources (~350’000 Logic Elements)  Embedded bidirectional gigabit links  Additional gigabit ethernet link Production and planning well defined and on schedule  Six new printed circuit boards under design  Five FPGAs under design  Test-benches for verification and software development christos.zamantzas@cern.ch25BI LINAC4 Review – 18/10/2011

26. THANK YOU

27. RESERVED SLIDES

28. Prices used for the estimation christos.zamantzas@cern.ch28 Monitor IC1500 SEM0 ACEM0 LIC0 Module Mezzanine (prototype)40000new development; will be split between projects Carrier (production)2500VME64x re-production Mezzanine (production)400 Processing2900not including protyping costs prototype60000new development; will be splitted between projects production1500price per card to produce Mezzanine300assuming gigabit link Acquisition1800not including protyping costs Combiner & Survey2000needs re-production Acquisition crate chassis500 backplane1000 power supply300 Complete crate1800 Processing crate Complete crate (renovation)10000In the renovations the CPU is paid by CO cpu3000 Complete crate (new construction)13000In a new construction need to add the CPU cost Rack12400Value estimated from LINAC4 request by JCG Installation signal cable20price per metre for double shielded coaxial HV cable5price per metre HV power supply1100(730 Euro) should add as many as possible for better measurements Cable patch & Signal boxes208 Cabling and boxes for 1 BLM: HV cabling: Plug 2 * 33.0CHF/p ; cable 1CHF/m * 10 m -> total = 76CHF/ cable BNC cabling: Plug 2 * 16CHF/p ; cable 1CHF/m * 10 m -> total = 42CHF/ cable Box: 45 CHF/p; HV Socket 3 * 11.0CHF/p ; BNC Socket 2*6CHF/p -> 90CHF/P 208CHF/BLM BI LINAC4 Review – 18/10/2011