1. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami1

2. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami2 Figure 23.1 Multiple metal layers provide intrasystem connectivity on microchips or printed-circuit boards.

3. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami3 Figure 23.2 Example intersystem connectivity schemes.

4. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami4 Table 23.1 Summary of three interconnection schemes

5. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami5 Figure 23.3 RS-232 serial interface 9-pin connector.

6. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami6

7. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami7 Figure 23.4 Commonly used communication media for intersystem connections.

8. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami8

9. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami9 Figure 23.5 The three sets of lines found in a bus.

10. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami10 Figure 23.6 Synchronous bus with fixed-latency devices.

11. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami11 Figure 23.7 Handshaking on an asynchronous bus for an input operation (e.g., reading from memory).

12. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami12 Figure 23.8 I/O read operation via PCI bus.

13. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami13

14. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami14 Figure 23.9 General structure of a centralized bus arbiter.

15. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami15 Figure 23.10 Daisy chaining allows a small centralized arbiter to service a large number of devices that use a shared resource.

16. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami16 Figure 23.11 Wind vane supplying an output voltage in the range of 0–5 V depending on wind direction.

17. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami17 Table 23.2 Summary of four standard interface buses.

18. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami18 Figure 23.12 USB connectors and connectivity structure.

19. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami19 Figure 23.13 IEEE 1394 (FireWire) connector. The same connector is used at both ends.

20. Copyright  2005 by Oxford University Press, Inc. Computer Architecture Parhami20