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ICS 252 Introduction to Computer Design Lecture 8 Winter 2004 Eli Bozorgzadeh Computer Science Department-UCI.

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Presentation on theme: "ICS 252 Introduction to Computer Design Lecture 8 Winter 2004 Eli Bozorgzadeh Computer Science Department-UCI."— Presentation transcript:

1 ICS 252 Introduction to Computer Design Lecture 8 Winter 2004 Eli Bozorgzadeh Computer Science Department-UCI

2 2 Winter 2004ICS 252-Intro to Computer Design Reference –Lecture note by Rajesh Gupta on resource sharing [©Gupta] http://www.ics.uci.edu/~rgupta/ics280.html –Lecture notes by Kert Keutzer on logic synthesis [©Keutzer] http://www-cad.eecs.berkeley.edu/~niraj/ee244/notes Administrative –Midterm 1: Feb 13, 10 a.m. in the class

3 3 Winter 2004ICS 252-Intro to Computer Design Hardware compilation flow HDL RTL Synthesis netlist Logic synthesis netlist Physical design layout library [©Keutzer]

4 4 Winter 2004ICS 252-Intro to Computer Design Optimization of modules A B C B arrival time 15 nsrequired time 15 ns [©Keutzer]

5 5 Winter 2004ICS 252-Intro to Computer Design Reduce to combinational optimization Flip-flops Combinational logic Input arrival time Output required time [©Keutzer]

6 6 Winter 2004ICS 252-Intro to Computer Design Logic optimization library netlist Logic optimization netlist Tech independent Tech dependent 2-level logic opt Multi-level logic opt library [©Keutzer]

7 7 Winter 2004ICS 252-Intro to Computer Design Logic Synthesis Target: –Determine microscopic structure of a circuit (gate level representation) Two classes: –combinatorial circuits (by Boolean functions) –sequential circuits (using finite state machine diagram)

8 8 Winter 2004ICS 252-Intro to Computer Design Logic Synthesis Two-level combinatorial logic optimization –Modeled by sum-of-products or product-of- sums expressions forms –Direct impact on macro-cell design like PLA –Benefits the overall multi-level optimization Multi-level combinatorial logic optimization Synthesis of sequential logic

9 9 Winter 2004ICS 252-Intro to Computer Design Two-level Logic Synthesis Input –Boolean network, either sum-of-products (SOP) or product-of-sum (POS) –Timing characterization for the module (input arrival time) –Target library Objective –Minimize the size of Boolean function either on SOP or POS [©Keutzer]

10 10 Winter 2004ICS 252-Intro to Computer Design B={0,1} Y={0,1,2} 2:don’t care Input variables: X1,X2,…,Xn Output Variables: Y1,Y2,…,Ym Logic function f: F: B n  Y m ON-SET i : the set of all input values for which f i (x)=1 (x i ON ) OFF-SET i : the set of all input values for which f i (x)=0 (x i OFF ) DC-SET i : the set of all input values for which f i (x)=2 (x i DC ) Basic Definitions [©Gupta]

11 11 Winter 2004ICS 252-Intro to Computer Design Boolean function f(x) x1x2x3f1f2 00011 00110 01001 01101 10010 10112 11011 11121 [©Gupta]

12 12 Winter 2004ICS 252-Intro to Computer Design The Boolean n-Cube x1 x3 DC-SET OFF-SET ON-SET

13 13 Winter 2004ICS 252-Intro to Computer Design Boolean functions f : complement of f –ON-SET of fi is OOF-SET of fi and vice versa. Intersection (or and ) of f and g (f.g or f∩g) –Intersection of ON_SET of f and g Union (or or) of f and g (fUg, f+g) –Union of ON-SET of f and g If ONSET of f is B n (i.e., OFF-SET for f is empty) then f is the tautology If ONSET of f is empty f is not satisfiable If f(x)=g(x) for all x, f and g are equivalent x1,x2,…xn: variables x1,x1,x2,…,xn,xn: literals [©Keutzer]

14 14 Winter 2004ICS 252-Intro to Computer Design Don’t care condition Value of the function is not immaterial. Related to its environment: –Input value assignments that never occur –Input assignments such that some output is never observed Important for logic optimization [©Gupta]

15 15 Winter 2004ICS 252-Intro to Computer Design Prime Implicants Cubical representation: boolean variable Boolean literals: variable or complement Product of cube: product of literals Implicant: product that does not intersect with OFF-SET of function f Prime implicant: am implicant that is not contained by any implicant of the function Minterm: product of all input variables which does not intersect with OFF-SET of function f [©Gupta]

16 16 Winter 2004ICS 252-Intro to Computer Design Cover A cover is a set of cubes C such that Why cover? –Minimize number of implicants –Same cost per implicant –Minimize number of literals –Literals define programming transistors –Based on finding a cover [©Gupta]

17 17 Winter 2004ICS 252-Intro to Computer Design Covers A set of implicants Cardinality: number of implicants Min cover: minimum cardinality An irredundant cover is a cover such that removing any cube from cover results in a set of cubes that is not a cover Prime cover is a cover whose cubes are all prime implicants [©Gupta]

18 18 Winter 2004ICS 252-Intro to Computer Design Covers An essential prime of f is a prime that contains some minterm not contained in any other prime, A cover is said o be single cube containment minimal if no cube if the cover is contained in another cube of cover. A cover of f is said to be minimum if there exists no other cover with fewer cubes. [©Gupta]

19 19 Winter 2004ICS 252-Intro to Computer Design Minimum covers A Minimum cover can always be found by restricting the search to prime and irredundant covers Exact methods –Based on Quine-McClusky method, compute prime implicants and determine min cover Heuristic methods –Find minimal cover [©Keutzer, ©Gupta]

20 20 Winter 2004ICS 252-Intro to Computer Design Summary Logic synthesis basics Combinations logic synthesis Two-level logic optimization Two-level forms the theoretical foundation for multi-level logic synthesis Two-level optimization directly used for PLA/PLD design Two-level optimization is used as a subroutine in multi-level logic synthesis [©Keutzer]


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