1. uSOP for Belle2 Slow controls A. Aloisio, R. Giordano Univ. of Naples ‘Federico II’ and INFN – Sez. di Napoli A. Anastasio, G. Tortone INFN – Sez. di Napoli Belle-II Italia – Napoli - Dec. 17 th, 2014

2. Overview uSOP: micro Service Oriented Platform Application Examples Integration of uSOP in Belle2 Status and Plans Conclusions 2

3. Micro Service Oriented Platform Specs: – Cortex A8 uP @ 1GHz (Sitara) – 2 GB Flash – 512 MB RAM 3 A single-board computer Runs Linux Flexible: Ethernet, I2C, SPI, RS232, USB Low power: 2W Inexpensive: 100EUR Derived-from and compatible-with BeagleBoneBlack open source system All HW/SW for BBB con be reused with uSOP 16cm 10cm USB (device) Ether- net RS232 I2C SPI JTAG USB (host)

4. Full Remote Management 4 UART0 RST, boot Console, bootloader Auxiliary Ethernet for remote control over IP for: – Power cycle – µP RST – Boot mode selection UART over IP: – UART0 console – Bootloader – Flashing Linux OS on eMMC Based on Freescale MCF5208, running uC- Linux More tasks can be implemented (watchdog, controls, …) power uP

5. uSOP Usage 5 I2C, SPI, JTAG, UART, USB Your sensor/device here Extreme flexibility Large interface portfolio: can be connected to virtually any sensor/device Can even program external devices via JTAG Endless possibilities, will see just a few examples e.g. HV/Sensor/FPGA/ADC/DAC

6. Application Examples 6

7. Sensor Read-Out uSOP supports protocols for remote data acquisition via field busses (I2C, SPI, JTAG, …) Example for temperature readout in Belle2 ECL: LTC2499 ADC – 8 ch. diff or 16 ch. single ended – 24-bit, ΣΔ architecture – 50/60 Hz line noise filter – 7.5 Hz sampling Rate – On-chip Temperature sensor – I2C interface 7 ADC I2C uSOP

8. High-Voltage Control uSOP will be interfaced with custom Roma3 HV supply, such to provide a complete slow control path for APDs power supply HV control could be adjusted in real-time according to temperature measurement 8 Linear Regulator To APD Current limit ADC DAC I2C Roma3 HV supply uSOP

9. JTAG Programming 9 uSOP does not have FPGA on board (in this version), however can be used to program remote devices Xilinx JTAG State Machine implemented in SW Performance: – TCK running @ 500 KHz – Kintex7 XC7K325T programming takes around 3 min (91,548,896 bits,, ̴87MB, ̴0.5 MB/s) TCK TDI

10. Integration in Epics for Belle-II 10

11. uSOP + EPICS + CSS Belle-II slow controls require uSOP to be compatible with Epics and CSS Epics: Experimental Physics and Industrial Control System – Open Source software tools and libraries for real-time control systems (particle accelerators, telescopes, other large scientific experiments) CSS: Control System Studio – graphical development enviroment for handling remote sensors and actuators, fully compatible with Epics As a proof of concept, we have designed a basic DAQ and control application with uSOP, EPICS and CSS 11

12.  Reading a Thermistor EPICS on uSOP reads out the ADC via I2C and applies SH, B and lookup algorithms Data is displayed on a remote PC running CSS Noise floor is continuously evaluated, effective N-of-Bits calculated 12 SH - lookup table SH – B parameter Steinhart – Hart (SH)  = 670nV FWHM = 1.5  V 24 effective bits SH – B parameter SH – lookup table +/- 0.04 C Steinhart -Hart Equation

13. Reading  P ADC Sitara has an on-chip 12bit SAR ADC with 8ch mux EPICS on uSOP also reads out the ADC on the  P In this case, the 103AT-2 thermistor is read out single-ended 24bit (  ) and 12bit (SAR) readouts are compared (both SH) Latest LTC2983 Linear ADCs is going to be supported – Embedded linearization with 0.1°C Accuracy 13  (24bit) – SAR (12bit) SAR (12bit)

14.  ADC Dashboard Simple GUI to program the ADC features: – Sampling speed 1x 2x – Noise rejection 50Hz 60Hz both – On-chip T probe 14

15. Status and Future Plans 15

16. uSOP Design status HW 4 prototypes fully assembled: working ‘right away’: – uP, RAM, Flash  – I2C, RS232, JTAG, ADC  – USB, Eth0  PCB rework needed for : – uSD – Remote management – Safe uP boot To be done: – RAM delays fine tuning and calibration – SPI test 16 SW porting completed: – uBoot (via UART, uSD, Flash)  – Linux Debian on eMMC – I2C, SPI, ADC libraries  – JTAG state machine  To be done – Booting via Eth0 (if needed) – Power-up and boot remote management GUI (now, via command line)

17. uSOP+ ? uSOP could be enhanced by adding a flash ADC, such to have a waveform digitizer Would require a redesign, adding a FPGA for real-time data processing (e.g. numerical filters?) Not the baseline Possible ADC candidate: TI 16DX370 17

18. Conclusion uSOP is a small single-board computer for the slow controls of the Belle2 Forward Calorimeter… … yet, it is general enough to be deployed in other subdetectors collegues from other subdetectors can contact us if interested fully customizable and flexible to operate with different sensors through different protocols four prototypes have been assembled and successfully tested EPICS and CSS software environments have been tested in a simple case study : temperature monitoring newer version with FPGA and Flash-ADC (uSOP+) ? 18

19. Backup 19

20. Case Study: reading thermoresistors Semitec 103AT-2 (NTC) Thermistors used in Belle, to be used in Belle2. Many thanks to Miyabayashi-san for providing samples

21. lookup table -> Steinhart-Hart 21 Function T SH (°C) = f(R) ========================= T SH R(Ohm) Tcal -50.007 329500.0 -50.0 -44.980 247700.0 -45.0 -40.019 188500.0 -40.0 -34.991 144100.0 -35.0 -30.009 111300.0 -30.0 -24.984 86430.0 -25.0 -20.007 67770.0 -20.0 -14.991 53410.0 -15.0 -10.022 42470.0 -10.0 -4.995 33900.0 -5.0 -0.009 27280.0 -0.0 5.014 22050.0 5.0 9.993 17960.0 10.0 15.006 14690.0 15.0 19.999 12090.0 20.0 24.998 10000.0 25.0 29.997 8313.0 30.0 35.012 6940.0 35.0 39.999 5827.0 40.0 45.008 4911.0 45.0 49.996 4160.0 50.0 55.008 3536.0 55.0 59.998 3020.0 60.0 65.008 2588.0 65.0 69.992 2228.0 70.0 74.996 1924.0 75.0 79.989 1668.0 80.0 84.984 1451.0 85.0 89.991 1266.0 90.0 95.006 1108.0 95.0 100.008 973.1 100.0 105.011 857.2 105.0 110.001 757.6 110.0 Maximal error=0.02223 at temperature=-10.0 SEMITEC 103AT-2 function (x)steinhart_hart =============== (x)Steinhart-Hart coefficients A = 8.177288235198651e-04 B = 2.749072360702348e-04 C = -2.604956237307896e-06 D = 2.883593378062355e-07 1/T (°K) = A + B*ln(R) + C*ln(R) 2 + D*ln(R) 3 21

22. – 8 ch. diff or 16 ch. single ended – 24-bit, ΔΣ architecture – 50/60 Hz line noise filter – 7.5 Hz sampling Rate – Direct Sensor Digitizer (both low and high output impedance) – On-chip temperature sensor – I2C interface, up to 27 ADCs per chain 22 Power, I2C  ADC – LTC2499

23. Testing ADCs uSOP can be directly interfaced with the DC1012A-A board available from Linear Technology for performance evaluation uSOP behaves like I2C master and supplies power 23 Sensor inputs Sensor inputs Power, I2C