1. Chapter 3. Advanced Hardware Fundamentals The various parts you will commonly find in an embedded-system circuit 발표일시 : 2003. 12. 29 발표자 : 채화영

2. Contents  3.1 Microprocessors  3.2 Buses  3.3 Direct Memory Access  3.4 Interrupts  3.5 Other Common Parts  3.6 Built-Ins on the Microprocessor  3.7 A Last Word about Hardware

3. 3.1 Microprocessors  Address Signal  Data Signal  READ/  Pulses low when it want to get data  WRITE/  Pulses low when it want to write data  Clock Signal Input Fig. 3.1 A Very Basic Microprocessor

4. 3.1 Microprocessors(cont.)  Microprocessor and microcontroller  Microprocessor = small and slow microprocessor + limited or no capability for using RAM and ROM + pins ( pins can be set high or low or sensed directly by software) → There’s just small difference between them

5. 3.2 Buses Microprocessor can address 64K of memory The size of ROM and RAM : 32K READ/ - OE/ (Output enable) WRITE/ - WE/ Address Bus  Group of address signals Data Bus  Group of data signals A15 signals  Decide which of two chips- ROM or ROM Fig 3.2 A Very Basic Microprocessor System

6. 3.2 Buses(cont.)  Example  Microprocessor tries to read from address 0x9123 1001 0001 0010 0011 A15 : 1 → ROM : high, disabled RAM : low(inverter), enabled RAM sees only 0x1123 001 0001 0010 0011

7. 3.2 Buses(cont.)  Additional Devices on the Bus  Microprocessor should share same bus with additional devices  Memory mapping : the device look like more memory to the microprocessor  Two address space was supported (Memory and I/O address space) I/OSelected chip LowMemory address space highI/O address space

8. 3.2 Buses(cont.) I/OA19Enabled device Address Range low MEMEN/ 0x00000-0x7ffff highHighDV1 0x80000-0x800ff LowHighDV2 0x80000-0x80007 Fig 3.4 Memory Mapping and the I/O Address Space

9. 3.2 Buses(cont.)  Bus Handshaking 1.No Handshaking  Engineer must select parts for the circuit that can keep up with the microprocessor  Buy a microprocessor that is slow enough that it won’t get ahead of the other parts

10. 3.2 Buses(cont.) 2.Wait Signals This signal is that the memory can use to extend the bus cycle as needed. Need to build the circuitry to drive the wait signal correctly – time and cost problem Fig 3.5 Bus Handshaking with a Wait Signal

11. 3.2 Buses(cont.) 3.Wait State (and Performance) Wait State Generator is responsible for it Use different numbers of wait states for different parts of the address space - Microprocessor can handle with various devices in the system

12. 3.2 Buses(cont.) Fig 3.6 The Microprocessor Clock Times the Bus

13.  DMA(Direct Memory Access)  all without software assistance and the associated overhead  Two Problem 1.DMA can’t drive address and data signal at the same time as the microprocessor is driving those signals 2.How does the DMA know when it should transfer a second byte? 3.3 Direct Memory Access I/OMemory WRITE READ

14. 3.3 Direct Memory Access(cont.)  Problem 1 Fig3.8 Architecture of a System with DMAFig 3.9 DMA Timing

15.  Problem2 1.Edge trigger: DMA will transfer a byte whenever it sees a rising edge on DMAREQ 2.level trigger : DMA will transfer bytes as long as DMAREQ remains high 3.3 Direct Memory Access(cont.)

16.  Alternative way to make DMA work Fig3.10 Architecture of a System with DMAFig 3.11 DMA Timing

17. 3.4 Interrupts  Interrupt  it is told to stop doing what it is doing and execute interrupt routine.  IRQ(Interrupt Request)  The signal tells the microprocessor that it is time to run the interrupt routine

18. 3.4 Interrupts(cont.) Fig 3.12 Interrupt Connections

19. 3.5 Other Common Parts  Universal Asynchronous Receiver/Transmitter and RS-232  Convert data to and from a serial interface  Microprocessor → some more memory, need external circuitry for CE/ of UART  Run at odd rates : 14.7456 MHz  TXD, RXD, RTS(Request To Send), CTS(Clear To Send)

20. 3.5 Other Common Parts(cont.)  Registers  Used to control UART, to send data to and to received from UART  Register for write bytes  Receiving bytes  Indicating error condition on received characters  Telling The UART when to interrupt

21. 3.5 Other Common Parts(cont.) Fig 3.13 A System with a UART

22. 3.5 Other Common Parts(cont.)  Programmable Array Logic  Build more or less any small glue circuit you want  Have 10 to 20 pins and array of gates called PALs(Programmable Array Logic)

23. 3.5 Other Common Parts(cont.) Fig 3.14 A Circuit with a PAL In It

24. 3.5 Other Common Parts(cont.) Declarations // declare a device name AddrDecode DEVICE 'P22V10' "INPUTS“// declare input port A15 PIN 1 A14 PIN 2 iClk PIN 3 "OUTPUT“// declare output port !RamCe PIN 19 !UartCe PIN 18 !RomCe PIN 17 Wait PIN 16 Wait2 PIN 15 Equations// conditions of enabling chips RamCe = A15 RomCe = !A15 * !A14 UartCe = !A15 * A14 Wait.CLK = iClk// be evaluated when the rising edge of iClk Wait2.CLK = iClk Wait := (RomCe + UartCe) * !Wait2// output signal change as soon as input signals change Wait2 := Wait * !Wait2 end AddrDeode

25. 3.5 Other Common Parts(cont.) Wait := (RomCe + UartCe) * !Wait2 Wait2 := Wait * !Wait2 Fig 3.16 PAL Timing

26. 3.5 Other Common Parts(cont.)  ASICs(Application-Specific Integrated Circuits)  Microprocessor core + peripherals + glue circuitry  FPGAs(Field-Programmable Gate Arrays):  A large number of gates + connections

27. 3.5 Other Common Parts(cont.)  Watchdog Timers  Contains a timer that expires after a certain interval unless it is restarted.  If the timer is expire, the presumptions is that software failed to restart it  Generate RESET/ signal and send it to microprocessor

28. 3.5 Other Common Parts(cont.) Fig 3.18 Typical Use of a Watchdog Timer

29. 3.6 Built-Ins on the Microprocessor  Each auxiliary circuit is controlled by writing values to a small collection of registers  Timer  A counter that counts the number of microprocessor clock cycles  Then cause an interrupt when the count expires  DMA  Since a DMA channel and the microprocessor contend for the bus, certain process are simplified

30. 3.6 Built-Ins on the Microprocessor(cont.)  I/O pins  Used for any number of purposes  Turning LEDs on or off  Resetting a watchdog timer  Reading from a one-pin or two-pin EEPROM  Address Decoding  A handful of chip enable output pins that can be connected directly to the other chips  Memory Caches and Instruction Pipelines  Caches : small, extremely fast memory  Instruction Pipelines : a kind of caches for instruction.

31. 3.6 Built-Ins on the Microprocessor(cont.) Fig 3.19 Uses for I/O Pins

32. 3.7 A Last Word about Hardware  Cost  every copy of the hardware costs money- endeavor to eliminate a tiny parts  Space  portable, wearable, concealable  Power  more power -> a larger power supply  Heat  every additional part -> additional heat  Fast  clever software is better way