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R. Kluit Nikhef Amsterdam R. Kluit Nikhef Amsterdam Gossopo3 3 rd Prototype of a front-end chip for 3D MPGD 1/27/20091GOSSIPPO3 prototype.

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Presentation on theme: "R. Kluit Nikhef Amsterdam R. Kluit Nikhef Amsterdam Gossopo3 3 rd Prototype of a front-end chip for 3D MPGD 1/27/20091GOSSIPPO3 prototype."— Presentation transcript:

1 R. Kluit Nikhef Amsterdam R. Kluit Nikhef Amsterdam Gossopo3 3 rd Prototype of a front-end chip for 3D MPGD 1/27/20091GOSSIPPO3 prototype

2 R. Kluit Nikhef Amsterdam R. Kluit Nikhef Amsterdam The GOSSIP Detector principle Gas On Slimmed Silicon Pixels A low mass, radiation hard, detector for High rate, experiments Drift time measurement enables track reconstruction. Gas filled drift volume Silicon substrate (front end chip),ground; 0 V Cathode plane -500V GRID plane -400V 1/27/20092GOSSIPPO3 prototype

3 R. Kluit Nikhef Amsterdam R. Kluit Nikhef Amsterdam Requirements for Front-End Good efficiency for 1000e - input signals : Noise <100e - rms. Fast input for accurate drift time determination: ~1-2ns resolution => peaking time ~30ns. Low power for high resolution: Goal 100mW/cm 2, with 55 µm pixels => 3 µW/pixel Need Preamp, Discriminator, TDC (4b), ToT (4b), Buffers, Configuration (e.g. Threshold DAC) and test for each pixel. For SLHC design (future): Bunch & Event identification More (2?) event buffers per pixel Serial communication & Trigger handling High speed serial readout (>Gb/s), ATLAS compatible. 1/27/20093GOSSIPPO3 prototype

4 R. Kluit Nikhef Amsterdam R. Kluit Nikhef Amsterdam Prototyping history …2006: GOSSIPO-1 analogue front-end low input capacitance (30 fF) preamp with 1fF feedback. MEDIPIX with INGRID Works OK, but need better spark protection SiProt & later NiProd show good results 2007 TIMEPIX with INGRID and thicker SiProt spark protection much better, all tests not ready PSI46 with INGRID in progress, demonstrate gas detector. GOSSIPO-2 (2007) 16x16 prototype array, chip ok, need improvement Post process difficult (small) 1/27/20094GOSSIPPO3 prototype

5 R. Kluit Nikhef Amsterdam GOSSIP Front-End prototype Goal: Design a chip that can be used to build a functional detector. Prove GOSSIP concept with electronics designed specifically for this detector. Simple readout & compatible with ext. Trig. Now need larger and improved design. 1/27/2009GOSSIPPO3 prototype5 clk & signal drivers/colµmn clk &signal drivers 16x16 pixel cell array test 2006 GOSSIPO-2 chip: 256 55 x 55 µm pixels total area: 0.88 x 0.88 mm

6 R. Kluit Nikhef Amsterdam Pixel cell (2006) Only “Slow” clock distribution, 40 MHz “Fast” clock from local oscillator per pixel, 560MHz 4 bit TDC & latency counter > 1.78 ns resolution & 350 ns range. 4 bit DAC for threshold tuning control register for masking, test-pulse enable and DAC 1/27/2009GOSSIPPO3 prototype6 A preamp discriminator 4 bit DAC 4 bit LFSR fast osc. threshold adjust input pad enable test mask hit 6 bit conf. reg. test pulse bias lines threshold conf. data conf. clock event clockdata enable self clear reset enable clear TDC control

7 R. Kluit Nikhef Amsterdam GOSSIPO3 Motivation for GOSSIPO3: Verification of: Time resolution: drift time (1.6ns) & ToT (25ns) Noise : <80e- rms Power: <3µW/pixel Pixel uniformity: -Threshold spread (< noise σ ) -Gain, Time meas., etc. Discharge (spark) protection Demonstrate a detector of ~2x2 mm in Beam test 2010. 1/27/2009GOSSIPPO3 prototype7 Active pixel with INGRID Active pixel with INGRID

8 R. Kluit Nikhef Amsterdam New chip proposal 1/27/2009GOSSIPPO3 prototype8

9 R. Kluit Nikhef Amsterdam R. Kluit Nikhef Amsterdam Gossipo2: 2.0 x 3.0 => 3.0 x 3.5 mm 2 => size 10.5 mm 2 (~$48 k in MOSIS) Pixel size : gossipo2: 55 x 55 => 55 x 55 μ m cell size Sens. Area:gossipo2: 0.88 x 0.88 => 1.76 x 1.76 mm gossipo2: 16 x 16 => 32 x 32 aktive Pixels Need ~540 μ m space between matrix and edge chip Dyke Need 4 rows of terminating (dummy) pixels, total array 40x40 pixels Chip size ~ 3.3 x 3.7 mm Need some (3) analogue pixel outputs on edge matrix Study the ion drift and pulse shape (add analog output buffers) Area available outside pixel array for other test structures: Preamp, Discriminator, TDC, Bias, ….. (will be buried under InGrid dyke) Chip size & pixels 1/27/2009GOSSIPPO3 prototype9 20-1-2009 @Bonn

10 R. Kluit Nikhef Amsterdam Gossipo3 (1) 1/27/2009GOSSIPPO3 prototype10 In each pixel: -Preamp & Discriminator -Threshold DAC + reg. -TDC 4bit, 1.7 ns bins -ToT 4bit, 25ns bins -Read Latency counter, 4bit (400ns) or 2-100us (12b)? -Configuration reg. Readout data: 4 + 4 + (4 to12?)= 12 to 20 bits/pixel Self trigger/Fast OR Yes Test modes (Yes) Timed readout, variable latency Readout all pixels Buffer/pixel, auto clear after latency Readout speed 40MHz ? 20-1-2009 @Bonn

11 R. Kluit Nikhef Amsterdam R. Kluit Nikhef Amsterdam No design for Radiation tolerance (yet, but keep in mind). Low power design => Goal 100mW/cm 2, => 3uW/pixel @ 55x55um pixels Simple readout, shift all out @40MHz Simple Chip Configuration, shift in. Choose IBM 130nm Technology options, LM/DM,.. Share work on Preamp (FE-I4 like), discriminator, TDC, Threshold DAC, Bias, test circuits, GridTrig Preamp (?), Fast-OR,…. Proposal: Main engineer: V. Gromov. Blocks by Nikhef & Bonn. Discuss in weekly meeting, Tuesdays 15:00. Can we use design repository as with FE-I4 design group ? Gossipo3 (2) 20-1-2009 @Bonn 1/27/200911GOSSIPPO3 prototype

12 R. Kluit Nikhef Amsterdam Next Slides: Vladimir Analog, Sinan digital. Discussion -additional features and requirements. -Participation Time scale: 2009: -Spec & feasibility …May -design …Sept -tape-out Nov. 2010: -Chip test March- May -Detector processing …. -Beam test Aug-Oct? 1/27/2009GOSSIPPO3 prototype12 20-1-2009 @Bonn

13 R. Kluit Nikhef Amsterdam Additional prototype Proposal: Before Gossipo3 submission (~12mm 2 ), test basic circuits: Preamp (with bias) Discriminator (with bias) TDC/oscillator ? other features ? (MOSIS MPW May 11 th, July 20 th ?) (Name Gossipo3.0 &..3.1, or proto =..3, and next is..4) 1/27/2009GOSSIPPO3 prototype13

14 R. Kluit Nikhef Amsterdam Work partitioning (preliminary) 1/27/2009GOSSIPPO3 prototype14 PartStatusWorkdesignlayoutDesigners PreampConcept designDesign, simulation, implementation-- DiscriminatorConcept design-- Threshold DAC/opampIdea/prop.? TDC & countersConcept designNikhef Fast-ORplan “” ReadoutLike gossipo2Nikhef Bias blocks--? I/O pads & buffersSome of gossipo2? Signal distribution/buffers --Nikhef(?) Power distribution analysis (TDC) plan-- INGRID preamp ?--New item: specify & design? Chip integration--Full chip assembly & verificationNikhef

15 R. Kluit Nikhef Amsterdam R. Kluit Nikhef Amsterdam Mean Input signal charge (distribution) required threshold spread, gain, Test pulse feature INGRID preamp, feasibility, specs ? … Open issues on requirements 1/27/2009GOSSIPPO3 prototype15

16 R. Kluit Nikhef Amsterdam additional slides …. 1/27/2009GOSSIPPO3 prototype16

17 R. Kluit Nikhef Amsterdam preamp DAC R oscillator & discr. Control reg Latency counter logic TDC LFSR Pixel cell (2006) 1/27/2009GOSSIPPO3 prototype17 8 metal layers 55 x 55 µm

18 R. Kluit Nikhef Amsterdam GOSSIPO-2 chip layout 1/27/2009GOSSIPPO3 prototype18

19 R. Kluit Nikhef Amsterdam Layer stack at the input 1/27/2009GOSSIPPO3 prototype19 oxide V M7 VL M6 M5 V6 0.2 µm M6 M5 V6 0.72 µm 0.2 µm M6 M5 V6 0.2 µm V VL M6 M5 V6 M6 M5 V6 0.72 µm 0.2 µm M6 M5 V6 0.2 µm M6 M7 0.2 µm 2 µm 0.2 µm 5 µm High Resistive Amorphous Silicon opening 14 x 14 µm Metal layer (Al) 20 x 20 µm Nitride Nitride + oxide Nitride Nitride + oxide Integrated grid ( ≈ 1 µm thick metal grid) 50 µm Polyimide pillars M8, 21 µm x 21 µm opening 14 x 14 µm 10 x 10 µm M8, 21 µm x 21 µm preamp inputpreamp output preamp feedback 1.9 fF test input capacitance 13.5 fF Metal layer (Al) 20 x 20 µm wafer post processing chip wafer 55 µm pitch Nitride dimensions not to scale

20 R. Kluit Nikhef Amsterdam Spark protection 1/27/2009GOSSIPPO3 prototype20 -400 V from INGRID to electronics discharge gives ± 2 nC, burns a hole ! Add shield (GND) over signal routing on top of the chip (top layer) With NiProt, only area of pixel pad size makes Capacitance to input circuit : Q breakthrough = ± 8 pC Negative discharge: need “Diode” to substrate For example GOSSPO-2 preamp: NMOS in preamp DC feedback has diode (drain) to substrate (ground). Process requires “tie-down” diode to input. Area of diodes is large enough for protection of positive discharges. But, need negative. Total input capacitance ~30 fF. C NiProt -400V GOSSIPO2 preamp

21 R. Kluit Nikhef Amsterdam transistor current preamp input voltage present gossipo2 preamp with GGNFET and without Spark Protection Device 1/27/2009GOSSIPPO3 prototype21 Grounded gate NFET : W/L= 6/0.12 µm Dissipation in channel and drain diode area. 8pC in this volume > Δ T = 1° lpnfet C par ≈ 3-5 fF. Use Low Power NFET: no leakage current (<1 pA) at DC operating point of preamp input ( 0.4 V) pad preamp During negative breakthrough : Vin should not exceed -1.5 V. This determines the size of protection device.


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