1. US 26122 ADC (Analogue to Digital Conversion) and DAC (Digital to Analogue Conversion) 4 Weeks 3 Credits

2. Assessment Task 1 – Formal Test Task 2 – Formal Test* (A, M, E) Task 3 – Practical Work

3. Task 1: Identify and describe the process of four digital electronic devices/circuits. And for each circuit give at least one typical application. The circuits include: Inverter (op-amp) Comparator (op-amp) Monostable (555 timer) Bistable Latch (555 timer) Half-adder (logic circuit)

4. Inverter (Inverting op-amp) 1k Gain = -1

5. Inverting op-amp Both the input and output signals are voltages. They can be DC or AC. The input voltage is inverted (i.e. Gain = -1) then sent out as the output.

6. Comparator

7. The output of the op-amp is normally low. As the light level increases, the voltage between the LDR and resistor rises, so V 2 increases. When V 2 exceeds the reference voltage set by the other voltage divider at V 1 the output of the op-amp will go high. This is a one-bit ADC convertor. Input = Analogue Output = Digital

8. 555 Timer Monostable Circuit 1 – GND5 – Control 2 – Trigger6 – Threshold 3 – Output7 – Discharge 4 – Reset8 – Vcc

10. Charging and Discharging the Capacitor

11. 555 Timer Monostable Circuit The input is normally high. Then when the switch is pressed, the input goes low and the ‘falling voltage edge’ triggers the circuit. It turns the output high and also starts charging the capacitor. The capacitor keeps getting charged until its voltages reaches 2/3 of Vcc – the output remains high until this point. When 2/3 of Vcc is reached, the capacitor is discharged and the output becomes low.

12. 555 Timer Bistable Latch 1 – GND5 – Control 2 – Trigger6 – Threshold 3 – Output7 – Discharge 4 – Reset8 – Vcc

14. 555 Timer Bistable Latch The output is normally LOW because both pins 2 and 4 are normally held high by R 1 and R 2. When the switch is moved to the left (‘set’) the output goes high. When the switch is moved to the right (‘reset’) the output goes low. Both states due to the switch positions are stable.

15. Half-adder

16. Half-adder (adding A + B) When switch A is “on” (1) and switch B is “off” (0), the XOR gate gives a high output but the AND gate gives a low output. It does the same with A being “off” and B being “on”. If both switches, A and B, are “on”, then only the AND gate gives a high output. This output is the ‘carry’ digit in the sum of A and B. Two half-adders are combined to make a full- adder.

17. Full-adder