1. Progress in Fabrication and Analysis of Uni-travelling Carrier Photodiodes C. Graham, M. Natrella, A. J. Seeds Department of Electronic and Electrical Engineering, University College London, Torrington Place, London, WC1E 7JE, United Kingdom. Email: a.seeds@ucl.ac.uk

2. UTCs provided by III-V Lab 2 Photograph of two sample UTCs, with 3 x 15 µm 2 and 4 x 15 µm 2 area. These UTCs have been provided by III-V Lab and were fabricated as part of the project iPHOS UTC-PD Epitaxy Doping (cm -3 ) MaterialFunction Thickness (nm) p ++ GaInAsp-contact 200 p+p+ InP Ridge Layer 1000 p- gradual In 0.53 Ga 0.47 AsAbsorber120 nQ Spacer layers -- nInPDepletion300 n+n+ Q 1.17 Waveguide300 n+n+ InPn – contact-- FeSI - InPSubstrate-- Layer structure of the UTCs provided by III ‑ V Lab. This layer structure is based on that first designed and refined at UCL.

3. 3 S 11 magnitude in dB and phase in degree, measured with respect to the PNA 50  impedance. UTC impedance real part (resistance) and imaginary part (reactance). The reactance exhibits a capacitive behaviour (i.e. is negative) within the measured frequency range and is larger (in absolute value) for smaller area devices; applied negative bias also increases the reactance absolute value. The impedance real part is larger for smaller devices. UTC S 11 and impedance measurements

4. 4 UTC capacitance derived from the measured device reactance. The theoretical capacitance for the two different area devices at zero bias is about 16.6 fF for the 3 x 15 µm 2 UTC and 22 fF for the 4 x 15 µm 2 and should be reasonably constant over the frequency range. On the other hand, the capacitance extracted from the measured device reactance shows the trend plotted in the Figure. UTC capacitance measurement

5. 5 Comparison between measured S 11 /impedance of a 3 x 15 µm 2 area UTC and S 11 /impedance obtained from the simplified equivalent circuit for two different values of device capacitance, e.g theoretical (16.6 fF) and measured (68 fF) capacitance. UTC circuit analysis

6. 6 Reflection coefficient S 11 for the basic Circuit 1 and Circuit 2, in the complex variable s=σ+j2πf Example of a one-pole-one-zero function, such as the S 11 of Circuit 1 and 2, fitting the measured S 11 magnitude within the low frequency range (i.e. 0 GHz to 25 GHz). UTC semi-analytical study

7. Relation between the new equivalent circuit and the UTC structure. Comparison between measured S 11 /impedance of the UTC at 0 V bias (dashed blue line), and S 11 /impedance obtained from the new circuit which models the proposed effect of spacer layers and conduction band discontinuities (dotted red line) Novel UTC circuit model

8. 8 S 11 and impedance calculated using the CST model, compared with the experimental data and with the results obtained using the new circuit model. The amended value of 6.5 pH for Lp in the circuit, found with CST, would provide excellent agreement between circuit model and CST up to 400 GHz. UTC 3D full-wave modelling

9. New UTCs were fabricated in July 2015 with the aim improving performance of previous devices discussed in February 2015. Previous devices had exhibited: 1.Low responsivity (best 0.07) 2.High series resistance – steep roll off of r.f. response at low frequencies 3.Low yield for lower capacitance devices (< 4umx15um) To overcome these effects, the following modifications to the fabrication recipe were undertaken 1.Shallow etching of waveguide structures. 2.Deposition of Ti/Pt/Au contacts upon Quaternary n-InGaAsP. 3.The resulting structure required much thinner insulation layer enabling easier etching of vias down to device contacts. 4.The first test devices fabricated include an underlying n-doped region 9 Fabrication Aims

10. Test Device Fabrication Steps 10 The test device fabrication steps involved (a) deposition of Ti/Pt/Au p-contacts; (b) Etching of p contact/barrier layer down to the InP collector layer before etching the shallow waveguide; (c) Deposition of n –contacts upon the waveguide layer followed by annealing of contacts allowing for other heat cycles during fabrication; (d) Deposition of SiONx insulation layer, via etching and CPW deposition. InGaAs/ InGaAsP InP Fe:InP (a) (b) (c) (d)

11. 11 DC Evaluation of UTC devices Optical Waveguide The dark current plots show a typical diode profile with leakage typically below 1uA at -1V bias while series resistance was typically below 20 Ohms. Responsivity was calculated from photocurrent measurements at 10mW illumination at 1550nm, this was found to be between 0.11 to 0.19 which increased with optical waveguide width as would be expected.

12. S11 Measurements S11 Magnitude and Phase plots up to 67GHz indicate a relatively large parasitic capacitance similar for devices dimensions of all dimensions. At frequencies above a few GHz the signal is transmitted across the conductor rail of the CPW into virtual ground plane of n-doped InGaAsP layer across the parasitic capacitance.The z11 impedance derived from the this data indicates device capacitances from 240 to 300 fF.

13. Optoelectronic Response 13 Evaluation of optoelectronic frequency response between 100 MHz and 67GHz was performed using an Agilent PNA with Lightwave Component Analyser with the electrical signal response measured at increasing modulation frequency of a 6 dBm 1550nm source. The UTC photo-response calculated using the circuit model discussed earlier, agrees with the measured photo-response when the parasitic capacitance Cp in the circuit approaches 300 fF. For a good UTC design, the parasitic capacitance would be less than 5 fF and therefore a flatter response would be expected. The new device design with etching of the n-doped material is to produce devices which exhibit a similar response.

14. Heterodyne Output Measurement of Heterodyne output exhibits a sharp fall-off from 5 GHz which is indicative of transmission loss due to the large parasitic capacitance due to the n- doped material remaining below the conductor rail of the CPW waveguide. However the improved responsivity has produce a 100 fold increase in output power at low frequencies compared to previous devices fabricated. P opt = 50mW

15. 15 New Design and Fabrication To fabricate a UTC with the same dark current, responsivity and series resistance with no parasitic capacitance a new mesa structure was designed with no n-doped material below the CPW tracks: Coplanar waveguides (cutaway) Waveguide Facet Vias S.I. Substrate SiONx Insulating layer

16. Refined UTC circuit model and semi-analytical study of the UTC impedance 3D full-wave modelling of UTC structures Calculation of the absolute power emitted by antenna integrated UTCs New UTCS fabricated with shallow optical waveguide structures exhibit improved responsivity of 0.11 to 0.19 A/W. Refinements in metal contact composition and annealing regimes have improved contact resistivity hence improving the series resistance. The yield of expected high bandwidth devices with dimension down to 3 x 10 um 2 is much improved. New devices with shallow waveguide design have been fabricated but evaluation is still to be completed 16 Conclusions