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ELECTRONIC DEVICES BASIC OP-AMP CIRCUIT MOHD AIDIL IDHAM BIN DAUD 2110399 AZFAR ASYRAFIE BIN AHMAD 2110394
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APPLICATIONS D/A conversion D/A conversion – an important process for converting digital signals to analog(linear) signals. An example is a voice signal that is digitized for storage, processing, or transmission and must be changed back into an approximation of the original audio signal in order to drive a speaker. D/A conversion One method of D/A conversion uses a scaling adder with input resistor values that represent the binary weights of the digital input code. Although this is not the most widely used method, it serves to illustrate how a scaling adder can be applied. D/A conversion A more common method for D/A conversion is known as the R/2R ladder method.
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Picture below shows a four-digit digital-to-analog converter (DAC). The switch symbols represent transistor switches for applying each of the four binary digits to the inputs. The inverting ( - ) input is at virtual ground, and so the output voltage is proportional to the current through the feedback resistor R f (sum of input currents). The lowest-value resistor R corresponds to the highest weighted binary input (2 2 ). All of the other resistors are multiples of R and correspond to the binary weights 2 2, 2 1, and 2 0.
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EXAMPLE 13-9 Determine the output voltage of the DAC in Figure 13-27(a). The sequence of four-digit binary codes represented by the waveforms in Figure 13-27(b) are applied to the inputs. A high level is binary 1, and a low level is a binary 0 the least significant binary digits is D 0.
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FIGURE 13-28
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As mention before, the R/2R ladder is more commonly used for D/A conversion than the scalling adder and is shown in Figure 13-29 for four bits. It overcomes one of the disadvantages of the binary-weighted input DAC because it requires only two resistor values.
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D 3 input is HIGH (+5V) and the others are LOW (ground, 0V). This condition represents the binary number 1000. A circuit analysis will show that this reduces to the equivalent form shown in Figure 13-30(a). Essentially no current goes through the 2R equivalent resistance because the inverting input is at virtual ground. Thus, all of the current (I=5V/2R) through Assume that the D 3 input is HIGH (+5V) and the others are LOW (ground, 0V). This condition represents the binary number 1000. A circuit analysis will show that this reduces to the equivalent form shown in Figure 13-30(a). Essentially no current goes through the 2R equivalent resistance because the inverting input is at virtual ground. Thus, all of the current (I=5V/2R) through R 7 is also through R f, and the output voltage is -5V. The operational amplifier keeps the inverting (-) input near zero volts ( ≈ 0V) because of negative feedback. Therefore, all current is through R f rather than into the inverting input.
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FIGURE 13-30(A)
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FIGURE 13-30(B) Figure 13-30(b) shows the equivalent circuit when the D2 input is at +5V and the others are at ground. This condition represents 0100. If we thevenize looking from R8, we get 2.5V in series with R,as shown.
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This result in a current through Rf of I =2.5V/2R, which gives an output voltage of -2.5V. Keep in mind that there is no current into the op-amp inverting input and that there is no current through R7 because it has 0V across it, due to the virtual ground.
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FIGURE 13-30(C) Figure 13-30(c) shows the equivalent circuit when the D 1 input is at +5V and the others are at ground. This condition represents 0010. Again thevenizing looking from R 8, you get 1.25V in series with R as shown. This results in a current through R f of I = 1.25 V/2R, which gives an output voltages of -1.25V.
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FIGURE 13-30(D)
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In part (d) of figure 13-30, the equivalent circuit representing the case where D 0 is at +5 V and the other inputs are at ground is shown. This condition represents 0001. Thevenizing from R 8 gives an equivalent of 0.625V in series with R as shown. The resulting current through R f is I=0.625 V/2R, which gives an output voltage of -0.625V. Notice that each successively lower- weighted input produces an output voltages that is halved, so that the output voltage is proportional to the binary weight of the input bits.
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REFERENCE Electronic devices conventional current version 9 th edition
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