1. Introduction to Data Conversion EE174 – SJSU Tan Nguyen

2. ADC (Analog-to-Digital Converter): converts an analog signal (voltage/current) to a digital value DAC (Digital-to-Analog Converter): converts a digital value to an analog value (voltage/current) Sample period: for ADC, time between each conversion Typically, samples are taken at a fixed rate V FS / V ref (Full scale or Reference Voltage): Analog signal varies between 0 and V ref, or between +/-V ref Resolution: Number of bits used for conversion (8 bits, 10 bits, 12 bits, 16 bits, etc). Conversion Time: The time it takes for a analog-to-digital conversion Quantization is the process of converting a continuous range of values into a finite range of discreet values. This is a function of ADC, which create a series of digital values to represent the original analog signal. Differential Nonlinearity (DNL) error is the difference between an actual step width (for an ADC) or step height (for a DAC) and the ideal value of 1 LSB. Integral Nonlinearity (INL) error is the deviation of the values on the actual transfer function from a straight line. Effective Number Of Bits (ENOB) is a measure of the dynamic performance of an ADC. Vocabulary

3. Data Conversion System Real world signals are analog (temp, pressure, position, sound, light, speed, etc): Continuous time and continuous amplitude DSP can only process: Discrete time and discrete amplitude Digital data conversion system requires ADC and DAC. The ADC process utilizes sampling and quantization of the continuous analog signal. ADC converts an input analog value to an output digital representation. ADC is operated at a rate of f S samples per second. Anti-alias filter is used to avoid any aliasing phenomena. ADCs usually require the input be held constant during the conversion process, indicating that the ADC must be preceded by an Sample-and-Hold Amplifier (SHA) to freeze the band-limited signal just prior to each conversion. Because ADC is commonly needed, most modern microcontrollers has an in-built ADC unit. The digital data is processed by a microprocessor and output to a DAC. DAC is usually operated at the same rate f S as the ADC When the application demands, it is equipped with appropriate circuitry to remove any output glitches arising in connection with input code changes. The resulting staircase-like signal is finally passed through a smoothing filter to ease the effects of quantization noise.

4. There are two related steps in A-to-D conversion: Sampling and holding:  The analogue signal is extracted, usually at regularly spaced time instants.  The samples have real values. Quantization and Encoding:  The samples are quantized to discrete levels.  Each sample is represented as a digital value. ADC Process

5. Sampling is the process of recording an analog signal at regular discrete moments of time. The sampling rate f s is the number of samples per second. The time interval between samples is called the sampling interval T s =1/f s. Sampling In this example, v(t)=cos(2πft) is sampled with sampling interval T s =T/3 to produce the following v[n]. v[n] = cos(2πfnT s )by substituting t=nT s = cos(2πfnT/3)since T s =T/3 = cos(2πn3) since T=1/f The samples are shown as the sequence v[n] indexed by integer values of n. This expression for v[n] evaluates to the sample values as shown below.

6. If a sinusoidal signal is sampled with a high sampling rate, the original signal can be rec overed exactly by connecting the samples together in a smooth way (called ideal low pass filtering). In contrast, if a sinusoidal signal is sampled with a low sampling rate, the samples may be too infrequent to recover the original signal. Sampling The signal v(t)=cos(2πft) is sampled uniformly with 4 sampling intervals within every 3 signal periods. Therefore, 4Ts=3T and the sampling rate f s =(4/3)f. Notice that a different sinusoid cos(2πft/3) with lower frequency f/3 also fits these samples. Attempting to recover v(t)=cos(2πft) by ideal low pass filtering instead produces cos(2πft/3) since the latter has a lower frequency. So, the sampling rate fs=(4/3)f is insufficient to recover v(t)from the samples. The question that arises is: for which values of sampling rate f s can we sample and then perfectly recover a sinusoidal signal v(t) = cos(2πft)?

7. The Nyquist-Shannon Sampling Theorem states that the sampling rate for exact recovery of a signal composed of a sum of sinusoids is larger than twice the maximum frequency of the signal. This rate is called the Nyquist sampling rate f Nyquist. Nyquist-Shannon Sampling Theorem f s > f Nyquist = 2f max Example 1: Given the signal v(t) = 7 + 5cos(2π440t) + 3sin(2π880t)  the sampling rate f s > f Nyquist = 2(880)=1760 Hz. Example 2: Given the signal v(t) = 5 sin(2π50t) is sampled at f s = 40 Hz, what signal can be recovered after sampled? Solution: v[n] = 5 cos(2πn 50/40) = 5 cos(2πn(1.25)) = 5 cos(2πn(1 + 0.25)) = 5 cos(2πn(0.25)) = 5 cos(0.5 π n) Recovering signal: v r (t) = 5 cos(0.5π 40t) = 5 cos(2π 10t)  Sampling rate less than Nyquist rate results in original signal is not recovered known as aliasing phenomena

8. Analog-to-Digital Converter (ADC) ADC converts an input analog value to an output digital representation. ADC is operated at a rate of f S samples per second. Anti-alias filter is used to avoid any aliasing phenomena. ADCs usually require the input be held constant during the conversion process, indicating that the ADC must be preceded by an Sample-and- Hold Amplifier (SHA) to freeze the band-limited signal just prior to each conversion.

9. ADC Process t Continuous Signal Sampling & Hold Measuring analog signals at uniform time intervals Ideally twice as fast as what we are sampling Digital system works with discrete states Taking samples from each location Reflects sampled and hold signal Digital approximation

10. t Sampling & Hold Measuring analog signals at uniform time intervals Ideally twice as fast as what we are sampling Digital system works with discrete states Taking samples from each location Reflects sampled and hold signal Digital approximation ADC Process

11. t Sampling & Hold Measuring analog signals at uniform time intervals Ideally twice as fast as what we are sampling Digital system works with discrete states Taking a sample from each location Reflects sampled and hold signal Digital approximation ADC Process

12. t Sampling & Hold Measuring analog signals at uniform time intervals Ideally twice as fast as what we are sampling Digital system works with discrete states Taking samples from each location Reflects sampled and hold signal Digital approximation Sample and hold: The output only changes at periodic instants of time. The independent variable now takes values in a discrete set ADC Process

13. Quantization & Coding Use original analog signal Apply 2 bit coding Use original analog signal Apply 3 bit coding Better representation of input information with additional bits Quantizing: Partitioning the reference signal range into a number of discrete quanta, then matching the input signal to the correct quantum. Encoding: Assigning a unique digital code to each quantum, then allocating the digital code to the input signal. Quantization error

14. A 5 kHz Sine Wave sampled by a 3-bit versus a 16-bit ADC

15. Improve the accuracy in ADC Increase the sampling rate which increases the maximum frequency that can be measured. Increase the resolution which improves the accuracy in measuring the amplitude of the analog signal.

16. ADC Characteristics Out- put code

17. Quantization Noise Model When an ADC converts a continuous signal into a discrete digital representation, there is a range of input values that produces the same output. That range is called quantum (Q) and is equivalent to the Least Significant Bit (LSB). The difference between input and output is called the quantization error. Therefore, the quantization error can be between ±Q/2. Ideal 3-bit ADC Quantization Noise Any value of the error is equally likely, so it has a uniform distribution ranging from −Q/2 to +Q/2. Then, this error can be considered a quantization noise with RMS: Ideal ADC transfer function

18. Signal-Noise Ratio (SNR) relates to N-bits in digital presentation Assuming an input sinusoidal with peak-to-peak amplitude V ref, where V ref is the reference voltage of an N-bit ADC (therefore, occupying the full-scale of the ADC), its RMS value is To calculate the Signal-Noise Ratio, we divide the RMS of the input signal by the RMS of the quantization noise: SNR = 6.02 x N + 1.76 (dB) This SNR equation generalizes to any system using a digital representation.

19. Number of bits N: The higher is the number of bits, the more precise is the digital output. Quantisation error E q : The average difference between the analogue input and the quantized value. The quantization error of an ideal ADC is half of the step size. Sample time T sample : A sampling capacitor must be charged for a duration of T sample before conversion taking place. Conversion time T conv : Time taken to convert the voltage on the sampling capacitor to a digital output. ADC : Parameters

20. Examples

21. 3) Given V ref = 10V, and a 10-bit A/D output code is 0x12A. a) What is the ADC input voltage? b) If the input voltage is V in = 2.915 V, what is the output code? c) What is the input voltage range that yield an output code of 0x005? Solution: 1 LSB = Q = 10V / 2 10 = 0.00976 V = 9.76 mV  Q/2 = 4.88 mV a) V in = output_code / 2 N * V ref = (0x12A) / 2 10 x 5 V = 298/1024 x 10 V = 2.91015 V = 2910.15 mV (ADC Vin) b) For the output code 0x12A, the input voltage range is 2910.15 ± Q/2 or 2905.27 mV < V 0x12A < 2915.03 mV So for V in = 2.915 V the out put code is also 0x12A c) The ideal input voltage to produce output code 5 is V 0x005 = 5 x 9.76 mV = 48.8 mV The range for output code 0x005 is 48.8 ± 4.88 mV or 43.92 mV < V 0x005 < 53.68 mV Examples

22. Digital-to-Analog Converter (DAC) The digital data is processed by a microprocessor and output to a DAC. DAC is usually operated at the same rate f S as the ADC When the application demands, it is equipped with appropriate circuitry to remove any output glitches arising in connection with input code changes. The resulting staircase-like signal is finally passed through a smoothing filter to ease the effects of quantization noise.

23. DAC Characteristics

25. Example DAC Computations

27. Some Data Sheet Examples

29. References: http://www.ni.com/white-paper/4806/en/ http://inst.eecs.berkeley.edu/~ee247/fa10/files07/lectures/L11_2_f10.pdf http://194.81.104.27/~brian/DSP/ADC_notes.pdf http://ume.gatech.edu/mechatronics_course/ADC_F08.pdf ume.gatech.edu/mechatronics_course/ADC_F10.pptx http://astro.temple.edu/~silage/Chapter8MS.pdf http://www.embedded.com/design/configurable-systems/4025078/Understanding-analog-to-digital-converter- specifications ume.gatech.edu/mechatronics_course/ADC_F12.pptx http://www.elin.ttu.ee/~olev/lect2.pdf http://my.ece.msstate.edu/faculty/reese/ece3724_pic16/lectures/adcdac.pdf http://www.mediacollege.com/glossary/q/quantization.html http://www.ti.com/lit/an/slaa013/slaa013.pdf http://www.ti.com/europe/downloads/Key%20Parameters.pdf https://courses.engr.illinois.edu/ece110/content/courseNotes/files/?samplingAndQuantization http://www.onmyphd.com/?p=quantization.noise.snr http://masteringelectronicsdesign.com/an-adc-and-dac-least-significant-bit-lsb/