1. © Janice Regan, CMPT 300, May 2007 0 CMPT 300 Introduction to Operating Systems Operating Systems Overview: Using Hardware

2. Multiple interrupts + PICs  In some systems interrupts may be sent directly from the hardware to the CPU  In such systems managing of what happens when an ISR is interrupted must be carefully considered  In many systems an additional hardware component called a PIC (Programmable interrupt controller) is used.  When a PIC is used all interrupts are sent to the PIC and the PIC queues and manages the interrupts  The PIC will usually send only one interrupt at a time to the CPU (unless preempted by a more critical interrupt). © Janice Regan, CMPT 300, 2010-2016 1

3. 2 Multiple Interrupts  One of the pieces of state information describing a program may be whether interrupts are enabled  Many things done in ISRs should not be interrupted  It is possible to disable interrupts and later re- enable them to protect such critical parts of the program or ISR.  What happens if an interrupt happens while a previous interrupts ISR is being executed?

4. © Janice Regan, CMPT 300, 2010-2016 3 Multiple Interrupts  IF interrupts are disabled, then the interrupt is lost.  IF there is a PIC (programmable interrupt controller)  the request will be queued by the PIC and sent to the CPU after the present interrupt is complete  If the interrupt is higher priority than the presently executing interrupt it may immediately be sent to the CPU an interrupt the present ISR  Otherwise the ISR being executed at the time of the interrupt will be interrupted in exactly the same way the it interrupted the original program

5. © Janice Regan, CMPT 300, 2010-2016 4 Write policy / I0 devices  We can do IO  without interrupts (Busy Waiting or Programmed IO)  with interrupts (interrupt driven IO)  We can also use special hardware call a DMA (direct memory access) device  transfers a block of data with a single IO operation  The rate of IO (reads or writes per second) is constrained by how fast the processor can test and service the IO device.  For programmed IO and interrupt driven IO hardware must be initialized by the CPU for every word transferred  For DMA IO the DMA needs to be initialized only once for the entire block of data (MUCH faster). The DMA does the rest without CPU participation

6. © Janice Regan, CMPT 300, 2010-2016 5 Simplified DMA operation  To transfer a block of data the CPU sends the DMA  The read or write request (input or output ?)  The starting memory location to begin the copy  The destination memory location where the copied block will begin  The size of the block of data to be copied  The processor can then continue with other operations and let the DMA complete the transfer of the block of data  A DMA can transfer data between different areas of memory (L1, L2 cache, main memory, disk) or between locations within a single area of memory

7. © Janice Regan, CMPT 300, 2010-2016 6 Approaches to I/O of a block of data Programmed IO YES Interrupt driven IO CPU executes read/write request for next word Initialize hardware Error condition? NO Next instruction Do something else Return from interrupt CPU executes read/write request for next word Initialize hardware Done register false is IO of word Finished? Check done register NO Next instruction YES CPU executes read/write request for next word Setup DMA Another word? NO YES Another word In block? NO YES Next instruction Error condition? NO YES DMA driven IO ERROR

8. © Janice Regan, CMPT 300, May 2007 7 CMPT 300 Introduction to Operating Systems Operating Systems Overview Part 2: History

9. © Janice Regan, CMPT 300, 2010-2016 8 The earliest computers (1945-55)  Built of relays, vacuum tubes  Very large, Very slow by today’s standards  Built, programmed and maintained by the same people  Programmed by wiring or machine language (input using switches, paper tape, etc)  No operating system, single operation, single problem, Sequential access

10. © Janice Regan, CMPT 300, 2010-2016 9 The next generation (1955-65)  Transistor based, increased reliability  The first commercial mainframes, still very large and very expensive  Used assembler or even early high level languages like Fortran or ALGOL  Rudimentary operating system, one program at a time, with control commands to compile, load, execute, terminate, basic compilers  Input using cards, paper tape, magnetic tape …

11. Single Job to Batch  Earliest machines had very rudimentary OS.  To run a job needed to load the compiler as well as the code for the job.  Required a great deal of operator intervention  CPU not efficiently used  Batch processing evolved to reduce the amount of time wasted setting up single jobs © Janice Regan, CMPT 300, 2010-2016 10

12. © Janice Regan, CMPT 300, 2010-2016 11 Early Batch processing  Collect a group of jobs  Each job was submitted as a stack of punched cards. Job card, language definition card (JCL) One card per line of code in program Cards for load and run instructions (JCL) Cards containing data for program End card indicating end of job (JCL)  Groups of jobs were collected and submitted as a batch to the card reader  Each job was read in, executed, produced it output, terminated, then the next job took over the machine

13. Monitor  Monitor was a piece of software (early OS) that controlled the sequence of events during batch processing. It had a resident portion and a non resident portion that included optional utilities etc.  The monitor reads the job (one job at a time) places it in the user area of memory.  When the job is completely loaded the monitor transfers control to the newly loaded program (using a branch instruction)  When the job is completed it passes control back to the monitor, which begins processing the next job. © Janice Regan, CMPT 300, 2010-2016 12

14. © Janice Regan, CMPT 300, 2010-2016 13 Early Batch Processing CPU Card reader Line printer

15. © Janice Regan, CMPT 300, 2010-2016 14 Operating System  Commands to  Read a single card to memory  Compile to machine language  Place machine language code in memory  Start execution (load address of first instruction in program in Program counter then begin execution)  Write output to the line printer (or other output device)  Trap condition switches control from program to OS END card being executed Illegal opcode, divide by zero, …

16. © Janice Regan, CMPT 300, 2010-2016 15 Problems with early batch processing  Input and output, particularly from peripheral I/0 devices (card reader, line printer), are very slow when compared to the execution of other instructions  When input and output is happening the CPU is mostly idle. An expensive resource is being wasted  A program trapped in a infinite loop would never terminate

17. © Janice Regan, CMPT 300, 2010-2016 16 Improving batch processing  Offload the slow I/0 tasks to less costly and powerful computers  Use faster I/O media (like tapes) for input to fast powerful machine  Add timers, if your time runs outs an interrupt is generated which terminates your program (deals with infinite loops)  Adds complexity, improves efficiency

18. © Janice Regan, CMPT 300, 2010-2016 17 Improving batch processing Line printer Fast CPU Card reader Line printer input output input output Less powerful CPU Less powerful CPU

19. © Janice Regan, CMPT 300, 2010-2016 18 Interrupts and traps  Interrupts are a mechanism by which other modules (memory, I/0, timers …) may interrupt the normal sequencing of instructions by the processor  Traps are caused by the user, for example the $END card supplied by the user causes a trap that ends the program.

20. © Janice Regan, CMPT 300, 2010-2016 19  More complicated OS  Deal both with I/0 intensive and CPU intensive jobs efficiently  Multi programming (with partitioned memory)  Switches between tasks Read cards to job queue on disk (whenever card reader is ready) Print results to printer from printer queue on disk (only when printer is available and job is complete) Load and run jobs  Changes enabled by going from tape to disk Tape is purely sequential Disk is more flexible (not purely sequential) The next generation (1965-1980)

21. © Janice Regan, CMPT 300, 2010-2016 20 The next generation (1965-1980) Card reader DISK Line printer Program queue Fast CPU Printer queue

22. © Janice Regan, CMPT 300, 2010-2016 21 Simultaneous Peripheral Operation On Line (Spooling)  Load jobs from card reader to spooling queue on disk  Load output from jobs into printer spooling queue on disk  When card reader or printer are available can add to/print from queue  When CPU finishes a job can immediately load the next job from the queue

23. © Janice Regan, CMPT 300, 2010-2016 22 Multiprogramming  Partition memory into pieces (often of different sizes)  Load one job into each partition (choose partition according to needs of job)  Have multiple jobs executing simultaneously, one in each partition  When one job is I/O bound another can be using the CPU

24. © Janice Regan, CMPT 300, 2010-2016 23 Interrupt operation Instruction N Instruction N+1 Write instruction Instruction N+3 Instruction N+5 Instruction N+7 Instruction N+8 Instruction N+9.:.: ISR (interrupt service routine) program Print hardware Initialize hardware, Begin print Print complete Send interrupt Save registers and state Restore registers and state B1 B2 B3

25. © Janice Regan, CMPT 300, 2010-2016 24 Context of example  The example of using an interrupt to facilitate output could be used as part of a spooling application.  What about input? Can we do the same?  If we do the same we have problems  If we execute the code following the read the value being read may be used in that code  If the value being read has not yet been placed in the variable, results will not be correct  How do we solve the problems?  Instead of executing the next block of code in the same program we allow a different program to run until the I/O interrupt has completed.  We combine spooling with multiprogramming

26. © Janice Regan, CMPT 300, 2010-2016 25 Multiprogramming: Interrupt example (1)  Program executes until it reaches a read instruction  The read routine sets up the input operation then returns leaving the input hardware (not the CPU) processing the input  Because successive instructions in the program may use the input value, the program cannot continue until the read is complete.  The read routine then interrupts program 1 saving registers and state. The the ISR loads the registers and state for program 2 and continues execution of instructions (P to P+7 next slide)

27. © Janice Regan, CMPT 300, 2010-2016 26 Multiprogramming: Interrupt example (2)  When the input hardware completes the output operation it generates and sends an interrupt to the system (signaling normal completion)  When the presently executing instruction in program 2 completes then program 2 is interrupted  The registers and state of program 2 are saved  An interrupt service routine completes the input operation  The registers and state of program 1 are restored  The original program continues executing

28. © Janice Regan, CMPT 300, 2010-2016 27 Program 2 Instruction P+1 Multiprogramming operation Instruction P Instruction P+2 InstructionP+3 Instruction P+5 Instruction P+7 Instruction P+8 Instruction P+9.:.: ISR3 (interrupt service routine) Read hardware Initialize hardware, Begin read Read complete Send interrupt Save registers and state program1 Restore registers and state program2 Instruction N Instruction N+1 Read instruction Instruction N+3 Instruction N+5 Instruction N+6 Instruction N+8 Instruction N+9.:.: Program 1 Save registers and state program2 ISR2 Restore registers and state program1

29. © Janice Regan, CMPT 300, 2010-2016 28 I/O wait Multiprogramming example I/O wait Program A, uniprocessing Followed by Program B, uniprocessing multiprocessing

30. © Janice Regan, CMPT 300, 2010-2016 29 Multiprogramming: Increased efficiency CPU Memory I/O Job 1 Job 2 Job 3