1. H. Huang Transparency No.10-1 The 68HC12 Microcontroller Chapter 10 68HC12 Analog to Digital Converter

2. H. Huang Transparency No.10-2 The 68HC12 Microcontroller Basics on A/D Conversion Most measurable quantities: analog in nature inputs to a digital computer! Analog to digital converter (A/DC) converts electrical voltage to a digital value. Non-electrical quantity first converted into electrical voltage: transducer Tranducer’s output voltage shifted or scaled to match AD/C input specifications: signal conditioning. Accuracy: number of bits used to represent digital value - Example : Most 68HC12 implement a 10-bit A/D convert Transducer temperature pressure light weight airflow humidity e.g. load cell, photocell, or thermocouple signal conditioning circuit (optional) voltage A/D converter Computer Digital Value

3. H. Huang Transparency No.10-3 The 68HC12 Microcontroller Successive Approximation Method V in (analog input) Digital-to-analog converter Output Latch Digital output Successive approximation register (SAR) Control Logic Clock Figure 10.2 Block diagram of a successive approximation A/D converter + - analog comparator V RH V RL Starting at MSB Reference Voltages (Next slide)

4. H. Huang Transparency No.10-4 The 68HC12 Microcontroller Most A/D converters are ratiometric. - A/DC compares input voltage against low/high reference voltage. - A digital value of 0 represents (V LREF ) - A digital value of max (e.g. 0x03FF for 10-bit) represents (V HREF ) - Digital values in-between represent ratio of input voltage within the range from (V LREF ) and (V HREF ) Vx = V LREF + (range  x)  (2 n – 1) where, range = V HREF – V LREF Example 10.1 For a 12-bit A/D with V LREF = 0.5V and V HREF = 3.5V, find voltage values represented by the A/DC of 20, 800, 2400, and 3600. Note : range = V HREF – V LREF = 3 V. V(20) = 0.5V + (20  3)  (2 12 – 1) = 0.515 V V(800) = 0.5V + (800  3)  (2 12 – 1) = 1.086 V V(2400) = 0.5V + (2400  3)  (2 12 – 1) = 2.258 V V(3600) = 0.5V + (3600 × 3)  (2 12 – 1) = 3.137 V - To take advantage the whole dynamic range of the A/D converter, we should set scale and shift the sensor output to V LREF ~ V HREF.

5. H. Huang Transparency No.10-5 The 68HC12 Microcontroller Overview of the 68HC12 A/D Converter on the Axiom Board 68HC12DP256: two 8-channel ratiometric A/D converters. - Successive-approximation for the A/D converter. - Requires a clock signal, frequency between 2 MHz and 500KHz. - Requires two reference voltages with accuracy only guaranteed for V RL = 0 V and V RH = 5 V. h HC12DP256 A/D Converters AD0 AD1 PAD00 PAD07 PortAD or PortAD0 PAD08 PAD09 PAD15 Port AD1

6. H. Huang Transparency No.10-6 The 68HC12 Microcontroller

7. H. Huang Transparency No.10-7 The 68HC12 Microcontroller

8. H. Huang Transparency No.10-8 The 68HC12 Microcontroller ATD Registers: Overview - Data Register: when used as a general-purpose INPUT port - Control Registers: configuring A/D parameters -six control registers; only last 4 implemented - Status Registers: indicate status of conversion (in-progress, done) - Result Registers: digital value result of conversion - Test Registers (used for factory testing) - DP256: two A/D converters (two sets of each of the above) - Example: PORTAD0 and PORTAD1 - Note: A/D registers in ATD0: mapped to the same memory locations as the corresponding registers when there is only one A/D converter. - Example: PORTAD0 and PORTAD refer to same port.

9. H. Huang Transparency No.10-9 The 68HC12 Microcontroller ATD Control Register 2 (ATDxCTL2) ADPU — ATD Power 1 = On 0 = Power down ATD AFFC — ATD Fast Flag Clear All 1 = ATD conversion complete: fast clear sequence (CCF flag clears automatically). 0 = Must read ATDSTAT before reading result to clear associated CCF flag AWAI — ATD Power in Wait Mode (1=PowerDown, 0 = continue) ETRIGE — External Trigger Mode (external trigger on ATD channel 7). Synchronize with external events. 1 = Enable 0 = Disable ETRIGLE — External Trigger Level/Edge Control ETRIGP — External Trigger Polarity ASCIE — ATD Sequence Complete Interrupt Enable 1 = Interrupt whenever ASCIF=1 is set. 0 = Interrupt requests disabled. ASCIF — ATD Sequence Complete Interrupt Flag If Interrupt Enabled (ASCIE) ASCIF = SCF flag, else ASCIF =0. 1 = ATD sequence complete; interrupt pending 0 = No ATD interrupt occurred SCF is in ATDStat

10. H. Huang Transparency No.10-10 The 68HC12 Microcontroller Control Register 3 (ATDxCTL3) FIFO — Result Register FIFO Mode 1 = Results put in consecutive result registers (wrap around at end). 0 = Results put in the corresponding result register up to the selected sequence length. FRZ1, FRZ0 — Background Debug Freeze Enable (always 0)

11. H. Huang Transparency No.10-11 The 68HC12 Microcontroller 76543210 SRES8SMP1SMP0PRS1 PRS0 PRS4PRS3 PRS2 0 00 0 0 00 0 value after reset: SRES8: ATD 10-bit mode control bit (1=8-bit, 0 = 10 bit operation) SMP1 and SMP0: select sample time bits (Table 10.1) PRS4…PRS0: divide-by factor for ATD P-clock prescaler. P clock divided by this value plus one, then fed into a divide-by-two circuit to generate ATD module signal. (Table 10.2) ATD conversion frequency: between 500KHz and 2 MHz ATD Control Register 4 (ATDxCTL4)

12. H. Huang Transparency No.10-12 The 68HC12 Microcontroller

13. H. Huang Transparency No.10-13 The 68HC12 Microcontroller Selecting Sample Time -SMP1 and SMP0: sample time. Higher resolution: longer time to convert. -Each application different requirements. -Prescale factor must bring your board’s clock frequency between the limits (we’ll be using 00000) Our examples use 0x60 = 0110 0000; 11 = 16 ATD clock cycles. If ATDclock = 4 MHz, 0.250 microsec * 16 = 4 microseconds.

14. H. Huang Transparency No.10-14 The 68HC12 Microcontroller ATD Control Register 5 (ATDxCTL5) -A write to ATDCTL5 starts a new conversion sequence. - Conversion is in progress when a write occurs: sequence aborted. DJM — Result Register Data Justification: justification of data in result registers. 1 = Right justified ; 0 = Left justified. DSGN — Result is Signed or Unsigned Representation 1 = Signed (not available in right justification). 0 = Unsigned SRES8DJMDSGNResult Data Formats 1008-bit/left justified/unsigned – bits 8-15 1018-bit/left justified/signed – bits 8-15 11x8-bit/right justified/unsigned – bits 0-7 00010-bit/left justified/unsigned – bits 6-15 00110-bit/left justified/signed – bits 6 – 15 01x10-bit/right justified/unsigned – bits 0 - 9

15. H. Huang Transparency No.10-15 The 68HC12 Microcontroller SCAN — Continuous Conversion Sequence Mode 1 = Continuous conversion sequences (scan mode) 0 = Single conversion sequence MULT — Multi-Channel Sample Mode 0 = Sample only from specified channel. Channel selected by channel selection code (CC/CB/CA). 1= Sample across channels. Number of channels sampled: sequence length (S8C, S4C, S2C, S1C). First channel examined: selection code (CC, CB, CA). Subsequent channels in sequence: increment Channel Select Code. CC, CB, CA — Channel Select Code Select the channel(s) whose signals are sampled

16. H. Huang Transparency No.10-16 The 68HC12 Microcontroller Result Registers (ADR0H/L..ADR7H/L, ADR00H/L..ADR07H/L, ADR10H/L..ADR17H/L – ASM NOTATION!) -Each ATD channel: eight result registers to hold conversion result. -Each result register: 16-bit; high and a low result register. -Can choose to use either 8-bit or 10-bit conversion mode. -8-bit mode: conversion result stored in high result register. -10-bit mode (left justified): H register holds upper eight bits of the conversion; L result register hold lowest two bits of conversion result in 2 MSB (7 and 6). - (Note: right justified: H holds 2 upper bits; L the lowest 8 bits)

17. H. Huang Transparency No.10-17 The 68HC12 Microcontroller ATD Status Registers (ATDxSTAT0 and ATDxSTAT1) -Each channel: 2 status registers (conversion complete?). SCF: sequence complete flag. Set at end of sequence (single conversion) or at end of first complete sequence (continuous) AFFC = 0 => SCF cleared when ATDCTL5 written (new conversion) AFFC = 1 => SCF cleared after the first result register is read. CC2..CC0: conversion counter bits for current 4 or 8 conversions. Result register to be written next (i.e. channel currently being converted). CCF7..CCF0: conversion complete flag For each result register, bit set at end of conversion for associated ATD channel. Remains set until that ATD result register is read. 76543210 SCF00CC1 CC0 00 CC2 0 00 0 0 00 0 value after reset: 76543210 CCF7CCF6CCF5CCF1 CCF0 CCF4CCF3 CCF2 0 00 0 0 00 0 (a) ATDxSTAT0 value after reset: (b) ATDxSTAT1

18. H. Huang Transparency No.10-18 The 68HC12 Microcontroller Example: Write a program to perform A/D conversion on the analog signal connected to the AN6 pin. Collect a single conversion result. Solution: - Initialize with the following (major) parameters (from Axiom): - Nonscan mode (SINGLE sequence = 8 conversions) - Select channel 6 -Enable ATD fast flag clear (CCF flag cleared automatically) - Disable interrupt -10-bit operation and 16 A/D clock periods of sample time -Choose 2 MHz as the conversion frequency for 4 MHz E clock

19. H. Huang Transparency No.10-19 The 68HC12 Microcontroller ADTCTL2 ( %11x1 1000 = $F8 ) - Enable ATD (set bit 7 to 1) - Fast Clear Sequence (Bit 6 = 1) - Power down AD in Wait mode (Bit 5=1) [ Optional] - External trigger sensitivity: high. (Bit 4,3 = 11), Disable external trigger (Bit 2 =0) - ATD interrupt disabled (set bit 1 to 0) ATDCTL3 ( %0000 0000 = $00 ) - 8 conversions per sequence - FIFO mode off (conversion result place in corresponding result register) ATDCTL4 ( %0110 0000 = $60 ) - Select 10-bit operation (set bit 7 to 0) - Set sample time to 16 ATD clock period (set bits 6 & 5 to 11) - Set clock prescale factor to 0 to select 4 MHz as the ATD clock frequency. ATDCTL5 ( %1000 0110 = $86 ) - Right justified (Bit 7 = 1) - Unsigned data representation (Bit 6 = 0) - Single scan (Bit 5 = 0)(Conversions initiated by write to ATDCTL5) - Sample only from AN6(Bit 4=0 and CC,CB,CA = 110 for AN6)

20. H. Huang Transparency No.10-20 The 68HC12 Microcontroller The following subroutine will perform the desired initialization: main ; Setup A/D converter channel zero movb #$f8,ATD0CTL2 movb #$00,ATD0CTL3 movb #$60,ATD0CTL4 movb #$86,ATD0CTL5 ; Initiate conversion brclr ATD0STAT, #$80, * ; Wait until complete ldd ADR06H ; get results anda #$03 ; For 10-bit result swi end AN6 means ADC0

21. H. Huang Transparency No.10-21 The 68HC12 Microcontroller The LM34 Precision Fahrenheit Temperature Sensors - Voltage output linearly proportional to ambient temperature. - No external calibration required. - Very linear over the temperature range - Accuracy is  0.5 o F at room temp. 1.5 o F over –50 o to +300 o F r - Draws about 75  A current from the power supply. On the Axiom Project Board : -LM32 temperature sensor connected to PAD6 (PortAD0 Pin 6 ) - “heater” is located close by, connected to Port M, pin 7 - + +12 V - 12 V 74 1 V M 12V V OUT LM34 68HC12 PAD6 5V V DDA V SSA V RH V RL 10K 240K - 12V 9V9V 100 PM7 (Inverter)

22. H. Huang Transparency No.10-22 The 68HC12 Microcontroller Example. Write an interrupt-driven program to continuously monitor temperature. Store temperature in a variable to be processed by the main program. Toggle heater on/off so that temperature continues to change. ADTCTL2 ( %11x1 1010 = $FA ) - Enable ATD (set bit 7 to 1) - Fast Clear Sequence (Bit 6 = 1) - Power down AD in Wait mode (Bit 5=1) [ Optional] - External trigger sensitivity: high. (Bit 4,3 = 11) - Disable external trigger (Bit 2 =0) - Enable ATD interrupt (set bit 1 to 1) ATDCTL3 ( %0000 0000 = $00 ) - Idem previous example ATDCTL4 ( %0110 0000 = $60 ) - Idem previous example ATDCTL5 ( %1000 0110 = $86 ) - Right justified (Bit 7 = 1) - Unsigned data representation (Bit 6 = 0) - Scan mode (Bit 5 = 0)(Single conversions) - Sample AN6 only (Bit 4=0 and CC,CB,CA = 110)

23. H. Huang Transparency No.10-23 The 68HC12 Microcontroller org $3FD2; Install ISR (AD06) FDB ADInt org $1000 temperature rmw 1 ; Global shared data ready dbFALSE ; Sync Flag ; (Assume TRUE/FALSE defined) org $4000 movb #$fA,ATD0CTL2 ; Enable ATD & ATint movb #$00,ATD0CTL3 ; Continue conversions movb #$60,ATD0CTL4 ; same as previous example movb #$86,ATD0CTL5 ; Right justified. ; Unsigned. Scan mode cli next: ldaa #FALSE waiting: cmpa ready ; INT sets “ready” beq waiting movw temperature, X movb #TRUE, ready... bra next

24. H. Huang Transparency No.10-24 The 68HC12 Microcontroller ADInt: bset PTM,#$80 ; heater on ldd ADR06H ; read temperature anda #$03; Ensure 10-bit resolution lsrd ; divide by 2 subd #$0005; Bias temperature sensor std temperature movb #TRUE, ready ; Delay: allow heater to change temperature ldab #$5 ; set counter pshb; save b jsr DelayX4; delay bclr PTM,#$80; turn heater off movb #$86,ATD0CTL5 ; Start a new conversion rti

25. H. Huang Transparency No.10-25 The 68HC12 Microcontroller Example. Write an interrupt-driven program to continuously monitor temperature. Store temperature in a variable to be processed by the main program. Toggle heater on/off so that temperature continues to change. ADTCTL2 ( %11x1 1010 = $FA ) - Enable ATD (set bit 7 to 1) - Fast Clear Sequence (Bit 6 = 1) - Power down AD in Wait mode (Bit 5=1) [ Optional] - External trigger sensitivity: high. (Bit 4,3 = 11) - Disable external trigger (Bit 2 =0) - Enable ATD interrupt (set bit 1 to 1) ATDCTL3 ( %0000 0000 = $00 ) - Idem previous example ATDCTL4 ( %0110 0000 = $60 ) - Idem previous example ATDCTL5 ( %1011 0000 = $B0 ) - Right justified (Bit 7 = 1) - Unsigned data representation (Bit 6 = 0) - Scan mode (Bit 5 = 1)(continuous conversions) - Sample every AN, starting in AN0 (Bit 4=1 and CC,CB,CA = 000)

26. H. Huang Transparency No.10-26 The 68HC12 Microcontroller org $3FD2; Install ISR (AD06) FDB ADInt org $1000 temperature rmw 1 ; Global shared data ready dbFALSE ; Sync Flag ; (Assume TRUE/FALSE defined) org $4000 movb #$fA,ATD0CTL2 ; Enable ATD & ATint movb #$00,ATD0CTL3 ; Continue conversions movb #$60,ATD0CTL4 ; same as previous example movb #$B0,ATD0CTL5 ; Right justified. ; Unsigned. Scan mode cli next: ldaa #FALSE waiting: cmpa ready ; INT sets “ready” beq waiting movw temperature, X movb #TRUE, ready... bra next

27. H. Huang Transparency No.10-27 The 68HC12 Microcontroller ADInt: bset PTM,#$80 ; heater on ldd ADR06H ; read temperature anda #$03; Ensure 10-bit resolution lsrd ; divide by 2 subd #$0005; Bias temperature sensor std temperature movb #TRUE, ready ; Delay: allow heater to change temperature ldab #$5 ; set counter pshb; save b jsr DelayX4; delay bclr PTM,#$80; turn heater off movb #$B0,ATD0CTL5 ; Start a new conversion rti

28. H. Huang Transparency No.10-28 The 68HC12 Microcontroller Example 10.4 & 10.6 Combined Write a program to perform A/D conversion on the analog signal connected to the AN7 pin. Collect 20 A/D conversion results and store them at memory location starting from $800. Use the configuration described below. Solution: - Write to ATDCTL5 register five times and collect four samples each time. - Wait until SCF flag of the ATDSTAT register is set to 1 and then collect the samples. Initialize with the following (major) parameters : - Nonscan mode (perform a SINGLE conversion = 4 or 8 conversions S8CM) - Select channel 7 -Enable ATD fast flag clear - Disable interrupt -Finish current conversion then freeze when BDM becomes active -10-bit operation and 2 A/D clock periods of sample time -Choose 2 MHz as the conversion frequency for 8 MHz E clock

29. H. Huang Transparency No.10-29 The 68HC12 Microcontroller Solution: ADT0CTL2 = ( %1000 0000 = $80 ) -Enable ATD (set bit 7 to 1) and Disable ATD interrupt (set bit 1 to 0) - Clear all other bits (Note : AFFC=0 means ATDSTAT must be read to clear status flag) ATD0CTL3 ( %0010 0000 = $20 ) - Select four conversions as the conversion sequence length ATD0CTL4 ( %0000 0001 = $01 ) - Select 10-bit operation (set bit 7 to 1) - Set sample time to two ATD clock period (set bits 6 & 5 to 00) - Set clock prescale factor to 4 to select 2 MHz as the ATD clock frequency. ATD0CTL5 (%1000 0111 = $87) - Select right-justified, unsigned representation - Select single conversion sequence and single channel - Select channel 7 (set bits 3..0 to 0111)

30. H. Huang Transparency No.10-30 The 68HC12 Microcontroller The following subroutine will perform the desired initialization: mainmovb#$80,ATD0CTL2 ldaa#10 ; the next two instructions create 5 us delay waitdeca; 1 E clock cycle execution time bnewait; 3/1 E clock cycles execution time movb#$20,ATD0CTL3 movb#$01,ATD0CTL4 ldy#5 loop5movb#$87,ATD0CTL5 ; start an A/D conversion sequence brclrATD0STAT,$80,* movwADR00H,2,x+ ; collect & save result (left- justified) movwADR01H,2,x+; post-increment the pointer by 2 movwADR02H,2,x+;“ movwADR03H,2,x+;“ dbney,loop5 swi end

31. H. Huang Transparency No.10-31 The 68HC12 Microcontroller The C language version of the program is as follows: #include void ATD_init (void); int buf[20]; void main (void) { int i; ATD_init(); for (i = 0; i < 5; i++) { ATD0CTL5 = 0x07; /* start an A/D conversion */ while (!(ATD0STAT0 & 0x80)); /* wait until complete */ /* store the result right-justified */ buf[4*i + 0] = ATD0DR0H * 4 + ATD0DR0L /64; buf[4*i + 1] = ATD0DR1H * 4 + ATD0DR1L /64; buf[4*i + 2] = ATD0DR2H * 4 + ATD0DR2L /64; buf[4*i + 3] = ATD0DR3H * 4 + ATD0DR3L /64; } asm ("swi"); } Notice: Name of Result Register is different in C

32. H. Huang Transparency No.10-32 The 68HC12 Microcontroller Problems Mixing C and ASM From DP256reg.asm: ADR00H: EQU REGBS+$90 ;ADC result 0 register ;Retrieve ATD Results from Channel 0 ldd ADR00H ;Reads A= ADR00H B= ADR00L anda #$03 ;Because result is 10-Bit From ICC12’s hcs12dp256.h: #define ATD0DR0H _P(0x90)//*char #define ATD0DR0L _P(0x91)//*char #define ATD0DR0 _LP(0x90)//*short int r; r = ATD0DR0H & 0x03FF;//Compiler won’t complain… //But what does it do?

33. H. Huang Transparency No.10-33 The 68HC12 Microcontroller Problems Mixing C and ASM #define ATD0DR0H _P(0x90)//*char #define ATD0DR0L _P(0x91)//*char #define ATD0DR0 _LP(0x90)//*short r = ATD0DR0H & 0x03FF; This line produces this assembly code: ldab 0x90 clra anda #3 andb #0 Which does not have the intended effect at all! Instead, use this: r = ATD0DR0 & 0x03FF; // No H! //A subtle difference, with a major effect

34. H. Huang Transparency No.10-34 The 68HC12 Microcontroller Problems Mixing C and ASM Similarly…From DP256reg.asm: ATD0STAT: EQU REGBS+$86 ;ADC status register hi *ATD0STAT EQU REGBS+$87 ;ADC status register lo brclrATD0STAT, #$80, * ;This works… From ICC12’s hcs12DP256.h: #define ATD0STAT _LP(0x86) #define ATD0STAT0 _P(0x86) If bit 7 of the ATD status register is the conversion complete flag, what is the problem with this line: while(!(ATD0STAT & 0x80));

35. H. Huang Transparency No.10-35 The 68HC12 Microcontroller Problems Mixing C and ASM ATD0STAT is a 16-Bit Register. The Motorola manual only shows that 8-Bits at $86, and nothing at $87. From the Register Map in the Motorola Manual ICC defines $86 as a 16-Bit register. Attempting to apply an 8-Bit bit mask to this register - say to 0x80 to check if conversion is complete - will not work. You must extend the bit mask to 16- Bits (i.e. 0x8000). Or, you may use ATD0STAT0, but you have to be aware that the name is different from the one Motorola uses. #define ATD0STAT _LP(0x86)//short #define ATD0STAT0 _P(0x86)//char