1. ECE 587 Hardware/Software Co- Design Lecture 23 LLVM and xPilot Professor Jia Wang Department of Electrical and Computer Engineering Illinois Institute of Technology April 11, 2016 ECE 587 Hardware/Software Co-DesignSpring 20161

2. Hardware Acceleration Provide (much) better performance, performance per cost, and/or performance per power/energy than general purpose processors. On specific applications: data analytics, deep learning, bioinformatics, etc. In specific environments: cell phone, cloud, data center, etc. (Much) less NRE cost and shorter time-to-market than ASIC designs. Use commercial off-the-shelf hardware platform. Provide flexibility in functionality via software. What hardware platforms are available? What language(s) should designers use? ECE 587 Hardware/Software Co-DesignSpring 20162

3. LLVM Chris Lattner, Chapter 11 LLVM, The Architecture of Open Source Applications ECE 587 Hardware/Software Co-DesignSpring 20163

4. Start as a project (Low Level Virtual Machine) to modernize open source compiler development. At then (early 2000) most open source compilers like GCC are of monolithic architecture, making reusing part of their code almost impossible. Huge obstacle if you want to try new ideas on compilers for real world impact. Now an umbrella project for a set low-level compiler toolchain components. Notably Clang. Also closely related to many new development of programming languages like OpenCL and Swift. ECE 587 Hardware/Software Co-DesignSpring 20164 The LLVM Compiler Infrastructure

5. Frontend: parse source code to build Abstract Syntax Tree (AST), and then into Intermediate Representation (IR). Optimizer: perform language/target-independent transformations. Backend: generate binary code good for particular target. ECE 587 Hardware/Software Co-DesignSpring 20165 Classical Three-Phase Compiler Design

6. Sharing of code makes it easier for people to contribute: no need to implement everything by themselves upfront. ECE 587 Hardware/Software Co-DesignSpring 20166 Architecture Implications

7. Observations Many language implementations don’t share code. Some language implementations may retarget to multiple processors in very language-specific ways. There are needs to build compilers for specific application domains. Successful stories Java and.NET virtual machines, translation to C code: good retargetability only if programming model matches. GCC: though it is extremely difficult to reuse its code as frontend and backend are tightly coupled. ECE 587 Hardware/Software Co-DesignSpring 20167 The Reality (before LLVM)

8. LLVM IR ECE 587 Hardware/Software Co-DesignSpring 20168

9. LLVM IR (Cont.) ECE 587 Hardware/Software Co-DesignSpring 20169

10. ECE 587 Hardware/Software Co-DesignSpring 201610 LLVM IR Optimization

11. ECE 587 Hardware/Software Co-DesignSpring 201611 Compiler Design with LLVM

12. Both in textual form for easy exchanging and as data structure for easy algorithmic manipulation. Frontend and backend developers can work independently, without the need to knowing much from the other group. As LLVM IR is very similar to CDFG, one may build HW/SW co-design tools for popular languages without a lot of knowledge of compiler frontend design, as long as one is familiar with CDFG/LLVM IR. Not the case for many other compilers like GCC. ECE 587 Hardware/Software Co-DesignSpring 201612 LLVM IR as the Only Interface between Phases

13. Each optimization pass reads LLVM IR in, performs certain transformations, then emits LLVM IR as the output. Hopefully the output LLVM IR will execute faster than the input. To optimize LLVM IR is then to choose a set of passes that will be applied sequentially. Can be easily extended. Can be application and target specific. ECE 587 Hardware/Software Co-DesignSpring 201613 LLVM IR as I/O of Optimization Passes

14. ECE 587 Hardware/Software Co-DesignSpring 201614 LLVM IR Optimization Example

15. Similar to optimization passes, code generation is also divided into passes to promote code sharing. Instruction selection Register allocation Scheduling Code layout optimization Assembly emission All can be replaced or customized for flexibility. ECE 587 Hardware/Software Co-DesignSpring 201615 LLVM Target Code Generation

16. Optimization across the boundary of languages. ECE 587 Hardware/Software Co-DesignSpring 201616 Interesting Capabilities

17. Code generation after target is known. ECE 587 Hardware/Software Co-DesignSpring 201617 Interesting Capabilities (Cont.)

18. xPilot Chen et al., xPilot: A Platform-Based Behavioral Synthesis System, SRC Techcon Conference 2005 ECE 587 Hardware/Software Co-DesignSpring 201618

19. Why did previous HLS tools fail (commercially)? Design complexity was still manageable at the RT level in 90’s. Lack of dependable RTL to GDSII flow due to the timing closure problem. HLS tools then were often inferior to manual designs. Advantages of HLS tools Better complexity management: 300K lines of code for typical RTL design vs. 40K lines of code of behavioral description. Shorter verification/simulation cycle Rapid system exploration Higher quality of results ECE 587 Hardware/Software Co-DesignSpring 201619 HLS Trend

20. Provide platform-based behavior synthesis technologies to optimize logic, interconnects, performance, and power simultaneously. Features Applicable to a wide range of application domains Amenable to a rich set of synthesis constraints Platform-based synthesis and optimization Extensible to consider physical information ECE 587 Hardware/Software Co-DesignSpring 201620 xPilot System Overview

21. Support SystemC and C LLVM GCC front-end first compiles SystemC/C into IR. Then high-level constructs, e.g. processes, ports, channels, are recovered from IR. Perform platform characterization Characterize the delay, area, and power for each type of available resource under different input/output count and bit width configurations. ECE 587 Hardware/Software Co-DesignSpring 201621 xPilot Frontend

22. Use linear programming based scheduling algorithm to support a variety of optimization techniques for both data-flow-intensive and control intensive applications. Perform simultaneous functional units and register binding Allow to consider the impacts from interconnects. Allow to explore the design space based on realistic platform-based measurements. ECE 587 Hardware/Software Co-DesignSpring 201622 Synthesis Engine

23. ECE 587 Hardware/Software Co-DesignSpring 201623 Experimental Results