1. Instrument Control Systems Seminar 2014, 20 th -24 th October 2014 IEEE1588 with TwinCAT Mario Kiekebusch (On behalf everyone who took part on this work)

2. Instrument Control System Seminar, 20 th -24 th October 2014 Outlook  Background  Technology  Measurements  Live Demo

3. Instrument Control System Seminar, 20 th -24 th October 2014 Background VLT Time Reference System Beckhoff PLCs

4. Instrument Control System Seminar, 20 th -24 th October 2014 Background Why do we need time synchronization?  Access to the Absolute Time – UTC (for tracking devices)  Hardware Synchronization

5. Instrument Control System Seminar, 20 th -24 th October 2014 Absolute Time

6. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Distributed Clocks (DC)  Unit 1 ns.  Universal zero 1.1.2000 00:00 Some DC capable terminals are 32bit only. They should not be select as reference clock.

7. Instrument Control System Seminar, 20 th -24 th October 2014 Technology  Offset compensation.  Propagation delays measurements.  Drift compensations. Precision < 100ns Automatic Synchronization Distributed Clocks (DC)

8. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Distributed Clocks (DC) IEEE1588 M External Synchronization

9. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Distributed Clocks (DC) Configuration  DC-capable terminals, e.g. Coupler EK1110  EL6688 Terminal  Selection of a Reference Clock

10. Instrument Control System Seminar, 20 th -24 th October 2014 Technology 1. Configuration of Terminal (EL6688) Distributed Clocks (DC) EtherCAT cycle time: 1 ms recommended, with slower cycle times the synchronization becomes less exact. Changing the settings 1. Set EL6688 to PREOP 2. Change parameters 3. Enter the value 0x65766173 in index 1010:01. 4. Set EL6688 to INIT and then OP1010:01.

11. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Distributed Clocks (DC) IEEE1588 terminal 2. Configuration of EtherCAT

12. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Distributed Clocks (DC) Terminal Data For mapping DC time not adjusted automatically.

13. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Distributed Clocks (DC) PLC Time Function Blocks Equivalent functions exist as well for C++

14. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Distributed Clocks (DC) PLC Time Function Blocks FB_DcAbsoluteTime DC time UTC Input Output Time Offset = Int. DC time – Ext. time + Leap second Absolute Time (UTC) = DC time – Time Offset

15. Instrument Control System Seminar, 20 th -24 th October 2014 Hardware Synchronization

16. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Oversampling  Resolution up to 1 µs for digital signals.  Resolution up to 10 µs for analog signals.

17. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Oversampling  Resolution up to 1 µs for digital signals.  Resolution up to 10 µs for analog signals.

18. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Oversampling Configuration  Oversampling capable terminals, e.g. ES2262 (Digital output terminal).  Definition of the Oversampling Factor

19. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Oversampling

20. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Oversampling 0000000000111100000000000000000000000000 Signal Width Single Shot  1 ms PLC cycle.  1000 oversampling factor 1 µs

21. Instrument Control System Seminar, 20 th -24 th October 2014 Technology Oversampling 1111000000111100000011110000001111000000 Timer Period Signal Width Periodic Timer  1 ms PLC cycle.  1000 oversampling factor 1 µs

22. Instrument Control System Seminar, 20 th -24 th October 2014 Measurements Time Synchronization

23. Instrument Control System Seminar, 20 th -24 th October 2014 Measurements SignalsSynchronization Method Precision Two signals from the same terminalDistributed Clocks< 10 nsec Two signals from the same terminalExternal time reference < 10 nsec Two signals from different terminals and from different segments Distributed Clocks< 10 nsec Two signals from contiguous terminals (same segment) External time reference < 200 nsec Two signals from different terminals and each terminal located in different segments. External time reference < 1 µs

24. Instrument Control System Seminar, 20 th -24 th October 2014 Measurements Oversampling

25. Instrument Control System Seminar, 20 th -24 th October 2014 Measurements PTP IEEE 1588 Beckhoff PLC Fiber Serial Timing Measurement

26. Instrument Control System Seminar, 20 th -24 th October 2014 Measurements

27. Instrument Control System Seminar, 20 th -24 th October 2014 Measurements ~1 µs Worst Case

28. Instrument Control System Seminar, 20 th -24 th October 2014 Measurements < 10 ns Best Case

29. Instrument Control System Seminar, 20 th -24 th October 2014 Measurements

30. Instrument Control System Seminar, 20 th -24 th October 2014 Summary  We tested a solution to access absolute time from PLCs.  We tested a solution for hardware synchronization.  TBD: WS driver  We measured the synchronization between PLC and LCU and confirmed that is under specs (< 10us).