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Published byHilda Gibbs Modified over 8 years ago
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1 Lab 2 Module-Based Digital Circuit Design and Verification
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2 Example ~ 四位元連續進位加法器
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3 Example (cont.)
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4 Full Adder
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5 Full Adder (cont.) Select Tool Check schematic and no error and Save. 1 2
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6 Full Adder (cont.) Select Tool Symbol Wizard 3 2 1
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7 Full Adder (cont.) 1 2
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8 Finish. 1
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9 Create New Schematic Create New Schematic Select “New Source” and type “ser_adder” under the File name. Cilick next and finish. 1 2 Right Click 3 4 5 6 檔名開頭請勿使用數字或特殊符號 並不要使用中文為檔名
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10 Create New Schematic (cont.) Create New Schematic (cont.) See “ser_adder” in the project and you can use “fulladder” in the symbols. 1 2 3
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11 Example (cont.) 1 Right Click 2 3
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12 Example (cont.) Example (cont.) To complete circuit.
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13 Example (cont.) Select Tool Check schematic and no error and Save. 1 2
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14 Example (cont.) Example (cont.) You can see the schematic hierarchy and start to simulation, so select “New Source” to add test bench wave. 1 2 Right Click 3
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15 Example (cont.) Example (cont.) Type “ser_adder_tb” under the File name. 1 2 3 4 5 6 檔名開頭請勿使用數字或特殊符號 並不要使用中文為檔名
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Example (cont.) Example (cont.) 16 Modify the ser_adder_tb.v and save it.
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17 Example (cont.) Example (cont.) Select “Behavioral” and Run. 2.Right Click 3 1
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Select Run-all. 18 Example (cont.) Example (cont.)
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19 Combine Signal 1 2 Select Signal MSB LSB
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20 Combine Signal [1] 1 2 3
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21 Combine Signal [2] 3 1.Right Click 2
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22 Combine Signal [3] 1 2 MSB LSB 3
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23 Result
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24 Question & Answer
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