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ARM Shifts, Multiplies & Divide??. MVN Pseudo Instructions Pseudo Intruction: Supported by assembler, not be hardware.

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Presentation on theme: "ARM Shifts, Multiplies & Divide??. MVN Pseudo Instructions Pseudo Intruction: Supported by assembler, not be hardware."— Presentation transcript:

1 ARM Shifts, Multiplies & Divide??

2 MVN

3 Pseudo Instructions Pseudo Intruction: Supported by assembler, not be hardware

4 Pseudo Instructions Pseudo Intruction: Supported by assembler, not be hardware

5 Pseudo Instructions Pseudo Intruction: Supported by assembler, not be hardware Replaced with other instruction(s)

6 Rotate & Shifts

7 Rotate Rotate : Move bits, overflow wraps around – Rotate Right 4:

8 Rotate Rotate Right: RORrd, rs, #___ rd  rs Shifted right # bits ROR rd, rs, rm rm

9 Rotate Rotate Left: Just rotate right by (32 – x bits) Left 12 bits = Right 20 bits

10 Logical Shift Logical Shift: Move bits, fill gaps with 0, drop overflow – Left Shift 4: – Right Shift 4:

11 LSL, LSR Logical Shift Left/Right LSLrd, rs, #___ rd  rs Shifted left # bits LSRrd, rs, #___ right LSLrd, rs, rm rd  rs Shifted left rm bits LSRrd, rs, rm right

12 Arithmetic Shift Arithmetic Shift Right: Move bits right, fill gaps with most significant bit, drop overflow – ASR 4 on Positive: – ASR 4 on Negative:

13 Arithmetic Shift Arithmetic Shift Right ASRrd, rs, #___ rd  rs Shifted right # bits ASRrd, rs, rm rm

14 Shifting & Math Shifting right N bits divides by 2 N

15 Shifting & Math Shifting left N bits multiplies by 2 N

16 Shift Architecture Shifter processes second operand to ALU

17 Shift Architecture Can specify a shift to apply to operand2 in other instructions: mov op1, op2, SHIFT_TYPE SHIFT_AMT

18 Shift Architecture Shifts are Pseudo Instructions implemented with MOV:

19 Shift Architecture Most data instructions support shifts operation dest, op1, op2, SHIFT_TYPE SHIFT_AMT

20 Multiply

21 Multiplier hardware separate from ALU

22 Basic Multiply MUL : Multiply MULrd, rs, rm rd  rs * rm No shifts or constants for rm!!!

23 Multiply & Accumulate MLA : Multiply with accumulate MLArd, rs, rm, rn rd  (rs * rm) + rn No shifts or constants Add results of multiply to r11

24 Divide

25 Multiply Divide??

26 Multiply Beefier ARM processors support – SDIV : Signed division SDIVrd, rs, rm rd  rs / rm – UDIV : Unsigned division UDIVrd, rs, rm rd  rs / rm

27 Multiply Divide?? – Powers of 2 : Shift! – Write a function to divide via subtraction – Do insane bit twiddling Like This Like This

28 High Level Languages

29 Shifts High level languages often provide bit shift Right shift may be arithmetic or logical!


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