1. Broadband Interfacing eMerlin-JIVE (1-10Gbps) Onsala-Jodrell Bank (<=40Gbps) Paul Burgess JBO Sept 06

2. Emerlin Current Thinking  eMerlin receivers+samplers inst. 2007/8  Fibre testing phase current  Samplers exist – format different from VLBI  32 Gb, 3-bit or 8-bit: need RFI rejection thinking  Need to interface existing Mark5's (~+5yrs)  Need to interface to Jive and Onsala  eMerlin will have rotational corrections in SB's

3. EVLBI Current Status ● 2001/2: PCEV system gave first 1gbps fringes in 'near-realtime' (~4 hrs) ● Hardware not directly compatible with Mk5, and JIVE must run Mark5 ● 2001-Now: Built up hard real-time eVLBI between JIVE and EVN stations ● Correlator load increased ● Most stations with 1Gb fibres = <=512 mbps ● Successful tests and science observations ● Repeatable – but beware congestion

4. Two Approaches ● Convert eMerlin band to analog and resample with existing hardware – now rejected as inefficient. ● Process digitally – better, more flexible but requires specific skills (Xilinx) ● Hardware is tricky – but DW has built 'iBob' and 'Bee2' general-purpose boards ● JB is building Xilinx experience and staff ● Reversible, OK for both interface tasks ● - So it's iBobs all round!

5. Hardware vs Software Software quick, cheap but problems: 'indeterminancy' Hardware better performance, more effort, more time, greater risks Techniques are the same Flowthru architecture best for SW or HW Hardware issue: Clock Synchronisation

6. System Interconnect

7. Additional Factors ● Maintain connection to both local Mark5's ● Prepare to replace Mk4/VLBA Data Racks ● Build-in flexibility ● Support new correlators ● Slight loss of band placement precision – not likely to be a problem ● WIDAR Corr. Has 10KHz offsets – possible problem with some spectral line expts. ● Require upward expansion path

8. Interface eMerlin to Internet

9. eMerlin->JIVE Interface ● System Design from Bryan Anderson at JBO ● Testing with one iBob – really needs memory for delay correction in long term. ● Initial tests with JB as 'Zero Delay' case. ● Modify incoming eMerlin format to VLBI- compatible – protocol issues ● Remove local delay/rotation correction ● Resample if necessary ● Implement filtering (Polyphase preferred)

10. Onsala->eMerlin ● Maximum 40 Gbps ● JBO will increase fibre capacity to Manchester this year – 40 Gbps ● May need 'Lightpaths' to Onsala ● Ibob board receives incoming data ● Ibob will handle delay correction ● Interface is 'Infiniband': = 10GigE ● Protocol considerations - unknown?

11. Protocol Issues 1 ● Lightpath different from Internet ● Real-time streaming like Audio ● Not concerned about large error rates ● Currently relying on improved IP protocols like fTCP, DCCP, others

12. Protocol Issues 2 ● Mark5 needed tcp/ip – if packet containing vlbi header is lost, whole frame goes. ● 'Incoherence' between tcp/ip and VLBI framing ● But can afford to lose quite a lot of white noise data (e ~1 in 10 e -4) ● Reorganise data to fit 10G Ethernet ● Assume 10GE is always a standard ● New correlators – assume >> 1Gbps ● New disk recorders can use 10GE

13. Observations ● ETHERNET has always been here pci,pcie,pcix,others- been and gone ● IP and Ethernet are long-term standards

14. Existing Hardware ● Ibob – 'Minimal' Xilinx V2 card - Modular ● Specialised for Digital Radio Apps ● Very limited onboard memory ● Doesn't run Linux ● Does appear as a Linux device ● Supports two sampler modules ● BEE2 – multi-Xilinx with memory ● But more expensive ● Can be a correlator

15. BEE2 and iBob

16. Costs ● Ibob Board, no CPU - $1800 ● BEE2 - $10,000 ● Xilinx CPUs – may be free, may not

17. Mark5 Issues ● Upgrade path - - ● Correlator goes to M5B ● Stations must go Mk4-Mk5B ● Mk5B is VSI compliant ● Mk5B can upgrade to 2GBPS 'Mk5+' ● Will require local connection at JB ● Move toward DBE after 2-3 years

18. CAVEATS! ● Just missed an iBob order ● Xilinx chips not supplied – may be free ● Some IP problems – eg. Tcp stacks ● Learning Curves ● Channelizing/'corner-turning' ● VSI – H and S are out of date - ● - VSIE is Upgradeable.

19. To-Do List 1 ● Hire Digital Hardware Engineer at JB ● Contact Dan Wertheimer - ● - Price completed iBobs (sans chip) ● - Boards – obtainf CAD files ● - Find way to assemble boards ● - Obtain Xilinx chips separate ● - Possible local manufacture ● - Do we need a memory board (no)

20. eVLA - eVLBI ● Haystack talk – Steve Durand ● Apparent recent increase in VLBI activity ● DEFORMATTER – plugs in to WIDAR ● VSI on-board, but needs Xilinx