1. Lab_1  Two Concurrent ALUs with SSD

2. ALU Concurrent Design ALU Sequential Design B2BCDBCD_2_7seg B2BCDBCD_2_7seg A B B2BCD BCD_2_7seg Two Concurrent ALUs with SSD Block Diagram

3. 3 Lab_2 Auto Execution of ALU Operations  Load all ALU operations into RAM (use Mega Core).  Input Data from Switches  ALU 1 will execute OPCODE (operation) from RAM 1  ALU 2 will execute OPCODE (operation) from RAM 2  And so on….  Show input and result on SSD (should be noticeable).

4. EKT303 PRINCIPLES OF COMPUTER ARCHITECTURE Mini Project Design and Implementation of Two Concurrent ALUs using Structural VHDL code for equally Workload Balance 4 VIVA ON 14-18 OF DECEMBER, 2015

5. The Two concurrent ALUs must connected through shared Memory as shown in Figure 1. 5 ALU 1 ALU 2 Shared Memory Figure 1