1. 1 The ALU l ALU includes combinational logic. –Combinational logic  a change in inputs directly causes a change in output, after a characteristic delay. –Different from sequential logic which only changes on the clock. l Two major components of combinational logic are – multiplexors & decoders. l 2-input multiplexor (or selector) is implemented with gates below abab s c symbol abab c s gate implementation

2. 2 Multiplexors can have any number of inputs (in theory) Multiplexors can apply to buses  multiplied for many lines. –Example: 1 x 2 multiplexor on 32 bits bus. 0123456701234567 s0 c 3 X 8 multiplexor s1 s2 a31 b31 s c31 a30 b30 c30............ a0 b0 c0 M M M abab s c 32 symbol Multiplexors (MUXes)

3. 3 Decoders l Each combination of the inputs enables exactly one output. I2I1I0O7O6O5O4O3O2O1O0 00000000001 00100000010 01000000100 01100001000 10000010000 10100100000 11001000000 11110000000 0123456701234567 DECODER 012012 InputsOutputs 3 X 8 Decoder

4. 4 The ALU l The ALU provides the basic logical and arithmetic functions: AND, OR plus addition. l Subtraction in 2's complement  invert +1. l Shift, multiplication and division are usually outside the basic ALU. Logical operations abab select (AND or OR) result 0101 MUX 1 bit logical unit for AND/OR operations

5. 5 abC in sumC out 00000 00110 01010 01101 10010 10101 11001 11111 inputs outputs sum = ( a  b  C in ) + ( a  b  C in ) + ( a  b  C in ) + ( a  b  C in ) = a + b + C in C out =(b  C in ) + (a  C in ) + (a  b) = ((a + b)  C in ) + (a  b) abab C out C in Adder hardware for C out in 2 layers 1 bit FULL adder (3,2) ab C in C out sum Carry in Carry out

6. 6 Full Adder from Half Adders Half adder Full adder from 2 half adders + or gate abab Cout sum Cin abab Cout sum

7. 7 1 bit simple ALU for logical / arithmetic operations abab select result 012012 + 2 Cin Cout 1 Bit Simple ALU

8. 8 Enhanced for subtraction abab select result 012012 + 2 Cin Cout invert 1's complement 2's complement: use Cin = 1 subtraction: a + b + 1 = a + (b + 1) = a + (-b) = a - b 0101 1 Bit Enhanced ALU

9. 9 Ripple Carry Type Adder l To produce a 32 bit result, we connect 32 single bit units together. l This type of ALU adder is called a ripple adder – Carry bits are generated in sequence. – Bit 31 result and Cout is not correct until it receives Cin from previous unit, which is not correct until it receives Cin from its previous unit, etc. – Total operation time is proportional to word size (here 32). a0 b0 result 0 Cin Cout Cin ALU0 Cout Cin ALU1 Cout Cin ALU2 Cout Cin ALU31 Cout...... a1 b1 a2 b2 a31 b31 result 1 result 2 result 31...... operation = invert + select 32 bit ADDER with ripple carry: 3

10. 10 Carry Lookahead l Ripple arithmetic operations are too slow for high performance l We can calculate all carries in 2-level logic, avoiding the ripple. We know that any logical function can be represented in canonical form (sum of products) but it requires more gates  too expensive. – Carry bit i has two possibilities: either a   b and no carry in, or a + b and carry in. But carry in itself is the same combination of the bits previous to those that created it. Hence two level logic has 2 n terms for n bits. l Practical adders use carry lookahead. – factors out two basic functions which give us the carries » Generate - does bit i create a carry by itself? » Propagate - does bit i send a carry ahead to the next position? g i = (a i  b i ) p i = (a i  b i ) c i+1 = g i + p i   c i

11. 11 Illustration of Carry Lookahead for 4 Bit Adder c in = c 0 C out a 0 b 0 result 0 ALU0ALU1ALU2ALU3 a 1 b 1 a 2 b 2 a 3 b 3 result 1 result 2 result 3 c 1 = g 0 + (p 0  c 0 ) c 2 = g 1 + (p 1  g 0 ) + (p 1  p 0  c 0 ) c 3 = g 2 + (p 2  g 1 ) + (p 2  p 1  g 0 ) + (p 2  p 1  p 0  c 0 ) c 4 = g 3 + (p 3  g 2 ) + (p 3  p 2  g 1 ) + (p 3  p 2   p 1  g 0 ) + (p 3  p 2   p 1   p 0  c 0 ) Carry Lookahead Unit g 0 p 0 g 1 p 1 g 2 p 2 g 3 p 3 p0g0p0g0 p1g1p1g1 p2g2p2g2 p3g3p3g3 c in = c 0

12. 12 Carry Lookahead Concept Generalized to Higher Levels C out a 0..3 b 0..3 result 0..3 4-bit Adder 0 0 - 3 4-bit Adder 1 4 - 7 4-bit Adder 2 8 - 11 4-bit Adder 3 12 - 15 result 4..7 result 8..11 result 12..15 Carry Lookahead on 4-bit units (provides logarithmic complexity) C in = C 0 G 0 P 0 G 1 P 1 G 2 P 2 G 3 P 3 P i = p i0  p i1  p i2  p i3 C i+1 = G i + P i  C i G i = g i3 + g i2  p i3 + g i1  p i2  p i3 + g i0  p i1  p i2  p i3 C in = C 0 p 00,..., p 03 g 00,..., g 03 p 1x g 1x p 2x g 2x p 3x g 3x a 4..7 b 4..7 a 8..11 b 8..11 a 12..15 b 12..15 4 44 44 44 4 4 4 4 4 4 4 4 4