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Networked Embedded Systems Pengyu Zhang EE107 Spring 2016 Lecture 8 Serial Buses.

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Presentation on theme: "Networked Embedded Systems Pengyu Zhang EE107 Spring 2016 Lecture 8 Serial Buses."— Presentation transcript:

1 Networked Embedded Systems Pengyu Zhang EE107 Spring 2016 Lecture 8 Serial Buses

2 In Assignment 2 … You will implement drivers for two serial buses USART driver to connect the microprocessor to the PC SPI driver to talk to Digital potentiometers SD card (optional)

3 This Week: Serial interfaces 3 Timers CPU Software Hardware Internal External Input System Buses AHB/APB ldr (read) str (write) ISA USART DAC/ADC Internal & External Memory GPIO/INT Output Interrupt Compare Capture I2C SPI UART ADC DAC C Assembly Machine Code Interrupts interrupts EMC SVC # fault traps & exceptions INT#

4 Outline Introduction to Serial Buses UART SPI I2C 4

5 Parallel Bus VS Serial Bus

6 Serial bus interface motivations Motivation Without using a lot of I/O lines I/O lines require I/O pads which cost $$$ and size I/O lines require PCB area which costs $$$ and size Connect different systems together Two embedded systems A desktop and an embedded system Connect different chips together in the same embedded system MCU to peripheral MCU to MCU Often at relatively low data rates But sometimes at higher data rates So, what are our options? Universal Synchronous/Asynchronous Receiver Transmitter Also known as USART (pronounced: “you-zart”) 6

7 Serial bus design space Number of wires required? Asynchronous or synchronous? How fast can it transfer data? Can it support more than two endpoints? Can it support more than one master (i.e. txn initiator)? How do we support flow control? How does it handle errors/noise? How far can signals travel? 7

8 How can we handle multiple (potential) bus drivers? (1/3) Tri-state devices, just have one device drive at a time. Everyone can read though Pros: Very common, fairly fast, pin- efficient. Cons: Tri-state devices can be slow. Need to be sure two folks not driving at the same time Let out the magic smoke. Most common solution (at least historically) Ethernet, PCI, etc.

9 How can we handle multiple (potential) bus drivers? (2/3) MUX Just have each device generate its data, and have a MUX select. That’s a LOT of pins. Not generally realistic for an “on-PCB” design as we’ll need an extra device (or a lot of pins on one device) But reasonable on-chip In fact AHB, APB do this.

10 How can we handle multiple (potential) bus drivers? (3/3) “pull-up” aka “open collector” aka “wired OR” Wire is pulled high by a resistor If any device pulls the wire low, it goes low. Pros: If two devices both drive the bus, it still works! Cons: Rise-time is very slow. Constant power drain. Used in I2C, CAN

11 Outline Introduction to Serial Buses UART SPI I2C 11

12 UART Uses PC serial port is a UART! Serializes data to be sent over serial cable De-serializes received data Slides from BYU CS 224

13 UART Uses Used to be commonly used for internet access Slides from BYU CS 224

14 UART Universal Asynchronous Receiver/Transmitter Hardware that translates between parallel and serial forms Commonly used in conjunction with communication standards such as EIA, RS-232, RS-422 or RS-485 14

15 Protocol Each character is sent as a logic low start bit a configurable number of data bits (usually 7 or 8, sometimes 5) an optional parity bit one or more logic high stop bits with a particular bit timing (“baud”) 15

16 UART Example Send the ASCII letter ‘W’ (1010111)

17 UART Hardware Connection

18 UART Character Reception Slides from BYU CS 224

19 UART Character Reception Slides from BYU CS 224

20 UART Character Reception Slides from BYU CS 224

21 UART Character Reception Receiver also verifies that stop bit is ‘1’ If not, reports “framing error” to host system New start bit can appear immediately after stop bit Receiver will resynchronize on each start bit

22 Let us design a UART transmitter Slides from BYU CS 224

23 Transmitter/System Handshaking Slides from BYU CS 224 System asserts Send and holds it high when it wants to send a byte UART asserts Busy signal in response When UART has finished transfer, UART de-asserts Busy signal System de-asserts Send signal

24 Transmitter Block Diagram Slides from BYU CS 224

25 Discussion Questions How fast can we run a UART? What are the limitations? Why do we need start/stop bits? How many data bits can be sent? 19200 baud rate, no parity, 8 data bits, 1 stop bit 25


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