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Wafer Scale Integration Tyler Stewart4/15/15 Wafer Scale Integration (or WSI) is a theoretical form of semiconductor packaging that is in development but.

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Presentation on theme: "Wafer Scale Integration Tyler Stewart4/15/15 Wafer Scale Integration (or WSI) is a theoretical form of semiconductor packaging that is in development but."— Presentation transcript:

1 Wafer Scale Integration Tyler Stewart4/15/15 Wafer Scale Integration (or WSI) is a theoretical form of semiconductor packaging that is in development but is the process of creating a computer chip from a whole silicon wafer. In theory this process has the potential to significantly increase speed, reduce power consumption, increases reliability, and increases the integration. Also focus on wafer size Trends.

2 Outline  Semiconductor Fabrication  Wafer Scale Integration  Definition  History  Benefits and Potential  Current issues and potential solutions  Wafer Size and Die size  Benefits and issues with increased wafer size

3 Silicon Wafer Fabrication

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5 History of WSI  Concept of WSI started sometime in the 1970’s  Companies that performed WSI research  ITT Corporation  Texas Instruments  Trilogy Systems

6 Gene Amdahl Born in South Dakota in 1922 In 1952 Completed his doctorate in theoretical physics at the university of Wisconsin Career began at IBM as the Chief Design Engineer One of the founding architects of the IMB 360 Mainframe Left IBM and founded the companies Amdahl Corporations Trilogy Systems Andor Systems Commercial Data Servers

7 Amdahl’s Dream Combine the functions of 100 chips onto one “Superchip” Trilogy Systems had the largest start-up cost of any company in the silicon valley at the time of $230 Million Founded to research WSI technology Design was a 2.5” square chip with 1200 pins Facility Flooded ruining clean rooms Declared Bankruptcy in 1994

8 Benefits and issues of WSI Benefits  Lower Cost/function  Higher performance  Highest reliability  Higher functional Density  Increased Application potential Issues  Requires a nearly 100% yield  Performance increase would have to be substantial to be economical  Timing Issues  Requires hundreds even thousands of pins

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10 What are some of the issues with Larger wafer sizes?  Interconnects  Timing  Requires equipment upgrades  Increased wafer stress

11 Concepts  Benefits of WSI  Issues with WSI  Issues with increased wafer size  Wafer Size Trends  Largest chip die

12 References  http://www.pcmag.com/encyclopedia/term/54178/wafer-scale-integration http://www.pcmag.com/encyclopedia/term/54178/wafer-scale-integration  http://www.computerhistory.org/semiconductor/timeline.html http://www.computerhistory.org/semiconductor/timeline.html  http://www.thocp.net/biographies/amdahl_gene.htm http://www.thocp.net/biographies/amdahl_gene.htm  http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6724626 http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6724626


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