2. The FPX KCPSM Module 1 Henry Fu The FPX KCPSM Module: An Embedded, Reconfigurable Active Processing Module for the FPX Henry Fu Washington University Applied Research Lab Supported by: NSF ANI-0096052 and Xilinx Corp. http://www.arl.wustl.edu/arl/projects/fpx/fpx_kcpsm/ hwf1@arl.wustl.edu

3. The FPX KCPSM Module 2 Henry Fu Motivation Hardware plugins are well suited for processing data with high throughput Software plugins are well suited for implementing complex control functions  Need a hybrid plugins that can implement complex control functions with high data throughput

4. The FPX KCPSM Module 3 Henry Fu Introduction The FPX KCPSM module is a hardware plugin that executes software on an embedded soft- core processor It implements active networking functions on the FPX using both hardware and software It includes circuits to be reprogrammed over the network and to execute new programs between the processing of data packets

5. The FPX KCPSM Module 4 Henry Fu Overview The FPX KCPSM Module is composed of three parts: –The KCPSM, a 8-bit microprocessor developed by Xilinx Corp. –The Protocol Wrappers, a circuit used to simplify the processing of ATM cells, AAL5 frames, IP packets, and UDP datagrams –The Interface, a circuit used to interconnect the KCPSM and the Protocol Wrappers

6. The FPX KCPSM Module 5 Henry Fu The FPX KCPSM Module KCPSM DATA MEMORY PROGRAM MEMORY ADDRINST INTERFACE D_MOD_IN CONTROL ADDRDATA PROTOCOL WRAPPERS INSTADDRPORT_ID BUS I/O BUS UDP PACKETS ATM CELLS D_OUT_MOD CONTROL SIGNALS UDP PACKETS ATM CELLS ENABLE_LREADY_L SOC_MOD_IN TCA_MOD_IN SOC_OUT_MOD TCA_OUT_MOD D_OUT_MODD_MOD_IN CLK RESET_L SIGNALS

7. The FPX KCPSM Module 6 Henry Fu Features Software can be loaded over the network through the use of UDP datagrams Up to four data packets and up to two programs can be stored in the module at a time  The processing function can be changed dynamically, on a packet by packet basis

8. The FPX KCPSM Module 7 Henry Fu Background of the FPX The FPX (Field Programmable Port Extender) –A reprogrammable logic device that provides a hardware platform to deploy network modules –It is composed of two parts: NID (Network Interface Device), a circuit that interconnects the WUGS (Washington University Gigabit Switch), the line cards, and the RAD RAD (Reprogrammable Application Device), a circuit that can be reprogrammed to hold user-defined network modules

9. The FPX KCPSM Module 8 Henry Fu Configuration of the FPX The FPX acts as an interface between the line cards and the WUGS IPP OPP IPP OPP Card OC3/ OC12/ OC48 Line FPX Extender Port programmable Field- FPX Extender Port Field- programmable Card OC3/ OC12/ OC48 Line Switch Fabric Gigabit

10. The FPX KCPSM Module 9 Henry Fu Major Components of the FPX KCPSMLoopback

11. The FPX KCPSM Module 10 Henry Fu Background of the KCPSM The KCPSM (Constant (K) Coded Programmable State Machine) –A 8-bit microcontroller –Consumes only 35 CLBs in FPGA –Provides 49 different instructions, 16 registers, 256 directly and indirectly addressable ports, and a maskable interrupt –Runs at a maximum frequency of 70 MHz –Developed by Ken Chapman of Xilinx Corp.

12. The FPX KCPSM Module 11 Henry Fu Background of the KCPSM (More) The KCPSM –Designed for Xilinx Virtex and Spart-II devices –Provided in the form of an EDIF macro –Included an assembler and debugger INPUT [7:0] INTERRUPT OUTPUT [7:0] PORT_ID [7:0] READ_STROBE WRITE_STROBE CLK ADDR [7:0]INST [15:0] KCPSM

13. The FPX KCPSM Module 12 Henry Fu Downloading the KCPSM Package The KCPSM Package from Xilinx Corp. –Visit http://www.arl.wustl.edu/arl/projects/fpx/fpx_kcpsm –Left click on the KCPSM package –Open the ZIP file –Extract to h:\xilinx –Start Cygwin Bash Shell Engineering > FPGA Tools > Cygwin Bash Shell cd /cygdrive/h/xilinx/

14. The FPX KCPSM Module 13 Henry Fu Contents of the KCPSM Package Access the KCPSM Package –An assembler called KCPSMBLE./KCPSMBLE debug.psm –An debugger called PSMDEBUG./PSMDEBUG debug.coe –Documentations A modified KCPSM package that includes example programs will be included as part of the FPX KCPSM package during the exercise

15. The FPX KCPSM Module 14 Henry Fu Background of the Protocol Wrappers The Protocol Wrappers –A circuit that streamline the networking functions to process ATM cells, AAL5 frames, IP packets, and UDP datagrams –A layered design that consists different processing circuit in each layer –Allows application to be implemented at a level where important details are exposed and irrelevant details are hidden

16. The FPX KCPSM Module 15 Henry Fu Overview of the Protocol Wrappers The Protocol Wrappers is composed of four circuits: –Cell Processor processes raw ATM cells between network interfaces –Frame Processor processes variable length AAL5 frames –IP Processor processes IP packets –UDP Processor sends and receives UDP datagrams

17. The FPX KCPSM Module 16 Henry Fu Overview of the Protocol Wrappers (More) UDP Processor IP Processor Cell Processor Frame Processor Data Output Data Input Application-level Hardware Module Interfaces to Off-Chip Memories

18. The FPX KCPSM Module 17 Henry Fu Downloading the Wrappers Package The Protocol Wrappers Package –Visit http://www.arl.wustl.edu/arl/projects/fpx/fpx_kcpsm –Right click on the Wrappers Package –Save it to h:\ –Start Cygwin Bash Shell Engineering > FPGA Tools > Cygwin Bash Shell cd /cygdrive/h/ gunzip wrappers.tar.gz tar xvf wrappers.tar

19. The FPX KCPSM Module 18 Henry Fu Contents of the Protocol Wrappers Package Access the Protocol Wrappers Package –Cell Processor cellwrapper.vhdl, the VHDL instantiation file cellproc_sim.vhd, the VHDL simulation file cellproc.edn, the EDIF Macro synthesis file –Frame Processor framewrapper.vhdl, the VHDL instantiation file frameproc_sim.vhd, the VHDL simulation file frameproc.edn, the EDIF Macro synthesis file

20. The FPX KCPSM Module 19 Henry Fu Contents of the Protocol Wrappers Package –IP Processor ipwrapper.vhdl, the VHDL instantiation file ipproc_sim.vhd, the VHDL simulation file ipproc.edn, the EDIF Macro synthesis file –UDP Processor udpwrapper.vhdl, the VHDL instantiation file udpproc_sim.vhd, the VHDL simulation file udpproc.edn, the EDIF Macro synthesis file –COREGEN Components

21. The FPX KCPSM Module 20 Henry Fu Overview of the Interface The Interface –A circuit that interconnects the KCPSM and the Protocol Wrappers –Switches the source and destination IP address and UDP port numbers, buffers the incoming UDP packets and stores them to the memory, resets the KCPSM, and writes the outgoing UDP packets back to the sender

22. The FPX KCPSM Module 21 Henry Fu Overview of the Interface (More) The Interface is composed of seven control units: –UDP Packets Header Switch –UDP Packets FIFO Control –UDP Packets Type Check –UDP Packets Store Control –KCPSM Reset Control –Unmodified Program Packets Echo Control –Completed Data Packets Write Control

23. The FPX KCPSM Module 22 Henry Fu Overview of the Interface (More) FIFO Program Memory Data Memory KCPSM Packet Program Unmodified Packet UDP ADDRINSTADDRDATA Control SignalsPacket UDP Packet UDP Packet Control Signals Control Signals Completed Data Packet Program Packet Data Packet Write Grant Signals Control Buffered UDP Packets Header Switch UDP Packets Type Check UDP Packets FIFO Control UDP Packets Store Control Data Packets Write Control Reset Control KCPSM Program Pkts Echo Control UDP Packet

24. The FPX KCPSM Module 23 Henry Fu Overview of the Interface (More) FIFO Program Memory Data Memory KCPSM Packet Program Unmodified Packet UDP ADDRINSTADDRDATA Control SignalsPacket UDP Packet UDP Packet Control Signals Control Signals Completed Data Packet Program Packet Data Packet Write Grant Signals Control Buffered UDP Packets Header Switch UDP Packets Type Check UDP Packets FIFO Control UDP Packets Store Control Data Packets Write Control Reset Control KCPSM Program Pkts Echo Control UDP Packet

25. The FPX KCPSM Module 24 Henry Fu UDP Packets Header Switch Control –Switches the source and destination IP address and UDP Port numbers of the UDP packets –Allows the unmodified program packets and completed data packets to be echoed back to the sender

26. The FPX KCPSM Module 25 Henry Fu UDP Packets FIFO Control –Buffers incoming UDP packets –Delays the arrival of the UDP packets to the UDP Packets Store Control so that it can wait for the result from the UDP Packet Type Check in order to determine whether to store the UDP packets into the program memory or into the data memory

27. The FPX KCPSM Module 26 Henry Fu UDP Packets Type Check –Determines if the incoming UDP packets is a program packet or a data packet –Inspects the first word of the UDP payload –0x00000000 indicates a program packet –0x00000001 indicates a data packet

28. The FPX KCPSM Module 27 Henry Fu UDP Packets Store Control –If the incoming packet is a program packet Stores the UDP payload, except the first word, into the program memory –If the incoming packet is a data packet Stores the whole packets, including the ATM, AAL5 Frame, IP and UDP headers, the UDP payload, and the ATM trailers into the data memory –Increments the bank counters so that the next UDP packet will store into the next available bank of memory

29. The FPX KCPSM Module 28 Henry Fu KCPSM Reset Control –Resets the KCPSM by asserting the Interrupt input of the KCPSM for two clock cycles –If there is no new program loaded Resets the KCPSM so that it processes the next available data packets using the current program –If there is a new program loaded Resets the KCPSM and increments the program counter so that it processes the next available data packets using the new program

30. The FPX KCPSM Module 29 Henry Fu Unmodified Program Packets Echo Control –Echoes the incoming program packets back to the sender –Passes any non-UDP packets through the module

31. The FPX KCPSM Module 30 Henry Fu Completed Data Packets Write Control –Writes the completed data packets back to the sender only if they have been processed by the KCPSM there is no new incoming data packet by inspecting the WR_GRANT signal from the UDP Packets Store Control

32. The FPX KCPSM Module 31 Henry Fu The FPX KCPSM Module Demo Network Data Compression using RLE (Run- Length Encoding) Algorithm –Compression example: ‘AAAABBBC’ compresses to ‘A4B3C’ –Decompression example: ‘A4B3C’ decompresses to ‘AAAABBBC’ –Allowed input characters range from ‘A’ to ‘Z’, ‘a’ to ‘z’

33. The FPX KCPSM Module 32 Henry Fu The FPX KCPSM Module Demo (More) Log on to fpx.arl.wustl.edu / fpx2.arl.wustl.edu using SSH (Secure Shell) fpx / fpx2 is connected to the line cards / fpx boards / WUGS fpx / fpx2 directs network traffic to the line cards / fpx boards / WUGS IP over ATM is configured on fpx / fpx2 to send UDP packets on VCI / VPI #96

34. The FPX KCPSM Module 33 Henry Fu The FPX KCPSM Module Demo (More) A C program called UDPTEST is executed on the fpx / fpx2 and is used to send program packets to the FPX KCPSM module –Download URL: http://www.arl.wustl.edu/arl/projects/fpx/fpx_kcpsm/ –Usage:./UDPTEST RLEEN.TBP (Encoder)./UDPTEST RLEDE.TBP (Decoder) –The file contains the raw machine code of the KCPSM program

35. The FPX KCPSM Module 34 Henry Fu Program Packet Processing KCPSM INTERFACE ProgramPacket Program PROGRAMMEMORY BANK ALTERNATECURRENT Independent Process INSTADDR INST program packet there is new incoming Proceed as long as there is new incoming program packet

36. The FPX KCPSM Module 35 Henry Fu The FPX KCPSM Module Demo (More) A C program called UDPSTR is executed on the fpx / fpx2 and is used to send data packets containing character strings to the FPX KCPSM module –Download URL: http://www.arl.wustl.edu/arl/projects/fpx/fpx_kcpsm/ –Usage:./UDPSTR [-h hostname] [-p destination port] –Enter the character strings in the input prompt

37. The FPX KCPSM Module 36 Henry Fu Data Packet Processing KCPSM DataPacket MEM DA TA ORY BANK ALT Data Packet ADDR ALTCUR INTERFACE DATA BUS ADDRDATA BUS ADDRI/O BUS Proceed as long as there is data packet incoming data packet there is new Proceed as long as and no new incoming data packet there is completed data packet Proceed as long as

38. The FPX KCPSM Module 37 Henry Fu The FPX KCPSM Module (Demo) Screenshot of the compression example:

39. The FPX KCPSM Module 38 Henry Fu The FPX KCPSM Module Demo (More) Screenshot of the decompression example:

40. The FPX KCPSM Module 39 Henry Fu Synthesis Results The FPX KCPSM Module is synthesized to a Xilinx XCV1000E-7-FG680: –Maximum Frequency: 70 MHz –Chip Utilization: 35% (4305 / 12288 slices) –External Input Buffers: 69 uses –External Output Buffers: 105 uses –Total LUTS: 3807 uses

41. The FPX KCPSM Module 40 Henry Fu Synthesis Results (More) The Xinlinx backend synthesis script: –ngdbuild -p xcv1000e-7-fg680 -uc design.ucf –map -p xcv1000e-7-fg680 -o top.ncd design.ngd design.pcf –par -w -ol 2 top.ncd design.ncd design.pcf –trce design.ncd design.pcf -e 3 -o design.twr -xml design_trce.xml –bitgen design.ncd -b -l -w -f bitgen.ut

42. The FPX KCPSM Module 41 Henry Fu Conclusion The FPX KCPSM Module –Demonstrates how to embed a softcore processor and how to use the Protocol Wrappers in an FPX module –Combines software flexibility and hardware performance into a hybrid module –Targets to work with the KCPSM, WUGS, FPX research environment, but can easily be changed to work with any FPGA-based system