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SPARC activities at Roma2 INFN-Roma2 L. Catani, E.Chiadroni, A.Cianchi, E. Gabrielli, M.Raparelli, S.Tazzari, M. Sabene (DAQ), G. Salina (DAQ), A. Salamon.

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Presentation on theme: "SPARC activities at Roma2 INFN-Roma2 L. Catani, E.Chiadroni, A.Cianchi, E. Gabrielli, M.Raparelli, S.Tazzari, M. Sabene (DAQ), G. Salina (DAQ), A. Salamon."— Presentation transcript:

1 SPARC activities at Roma2 INFN-Roma2 L. Catani, E.Chiadroni, A.Cianchi, E. Gabrielli, M.Raparelli, S.Tazzari, M. Sabene (DAQ), G. Salina (DAQ), A. Salamon (DAQ) INFN-LNF (Emittance-meter) M.Castellano, A.Clozza, M.Ferrario, V.Fusco, D.Filippetto, V.Lollo, G.Di Pirro, C.Ronsivalle (ENEA) INFN-Roma2 L. Catani, E.Chiadroni, A.Cianchi, E. Gabrielli, M.Raparelli, S.Tazzari, M. Sabene (DAQ), G. Salina (DAQ), A. Salamon (DAQ) INFN-LNF (Emittance-meter) M.Castellano, A.Clozza, M.Ferrario, V.Fusco, D.Filippetto, V.Lollo, G.Di Pirro, C.Ronsivalle (ENEA)

2 Presentations Emittance-Meter (this talk) Console System Design & E-Logbook (E.Gabrielli) Bunch Length Measurement (E.Chiadroni) data collection system for DAQ (this talk) Emittance-Meter (this talk) Console System Design & E-Logbook (E.Gabrielli) Bunch Length Measurement (E.Chiadroni) data collection system for DAQ (this talk)

3 Emittance-meter Layout (1)

4 Emittance-meter Layout (2)

5 Emittance-meter Layout (3)

6 bellows delivered new design for bellows support table design completed ready to order design requirements (e.g. minimum distance from cathode are fulfilled) Mechanical Components

7 longitudinal movement designed (100 µm accuracy) differential encoder + potentiometer for position read-out stepper motors defined ready to order X-Y steerings under study similar design as for linac steerings Long mover and steerings

8 goniometer stage + rotating stage for h-v pepper-pots tilt control originally selected from Micos catalog have now been custom designed (suited for our purposes and cheaper) 0.6 mrad accuracy/resolution Pepper-pot Results obtained so far cannot confirm the reliability of measurements even when the alignment of the pepper-pot is as low as 1–2 mrad, i.e. we cannot guarantee that emittance measurement results will not be effected by a 1–2 mrad tilted pepper-pot

9 accuracy of the pepper-pot vertical movement will be better than 2µm. this accuracy is needed for the single-slit (or multi-shot) emit.meas diff. encoder + potentiometer will provide position read-out second pepper-pot ready to order firm will assure machining precision of 5 µm all slits will be measured and certified Pepper-pot (2) YAG screens delivered and ready to be tested at BTF

10 Camera System

11 Camera System (2) preliminary results: Macro Objective resolution: ~25 µm @ 13 cm improvements are possible remote focus control under study

12 DAQ

13 Data Hub for DAQ based on PCI-PCI link

14 Reflective memory board with fiber optic interface Reflective memory board 64 bit x 66 MHz Master/Slave PCI interface with DMA engine 1 MByte Synchronous Static Dual Port RAM Fiber optic full-duplex high-speed link (850 nm VCSEL laser) To be added: block diagram

15 64 bit x 66 MHz PCI interface 64 bit 66 MHz 16 bit 80 MHz SerDes interface DPRAM interface 64 bit x 66 MHz PCI bus SerDes optical transceiver 1 MByte DPRAM 32 bit 80 MHz 16 bit 80 MHz 64 bit 66 MHz 32 bit 80 MHz 16 bit 80 MHz Altera Acex EP1K100FC484-1 Texas Instr. TLK2501CP Cypress CY7C0853V-100BBC Agilent HFBR-5720AL Data Flow

16 Printed Circuit Board 12 layers 5 routing layers 7 ground and power planes Controlled impedance for external layers (for high-speed link)

17 FPGA Firmware 64 bit x 66 MHz DMA engine: instruction loaded by the driver with PCI target operation and then data transfer is performed by the board with PCI master RD and WR operations (the CPU is freed) DPRAM: can receive data from the link and send data to the PCI interface at the same time Fast alert via PCI interrupt when DPRAM given memory locations are written TO BE ADDED: Dataflow and bottleneck description Customizations upon request

18 Costs Altera ACEX 1K 100 FPGA: 82,00 Euro (bought) Cypress CY7C0853V-100BBC SDPRAM: 130 Euro (bought) Texas TLK2501CP SerDes: 16,00 Euro (www.ebv.com) Agilent HFBR5720-AL Transceiver: 50,00 Euro (bought) AMP Surface Mount socket 1367073-1 (50 Euro ? To be confirmed) Other components (100 Euro ? To be confirmed) Board manufacturing (ELCO, agreement): 700,00 Euro (NRE) + 460,00 Euro/PCB (4 pcs, 10 working days) + 110,00 Euro/PCB (20 pcs, 25 working days) Board population (100-150Euro/board ? To be confirmed) OVERAL COST: ~700 EURO/board* *(IVA not included)

19 Time schedule Components selection: OK Schematic: OK PCB: placement OK, routing FPGA PCI OK, routing FPGA Serdes and FPGA DPRAM to do Firmware: most of the work has been done (M. Sabene) Board manufacturing: 10 working days Board population: 10 working days Driver: to do (Emiliano has already experience !)

20 Communication Protocol A “C” version of the LabVIEW-based communication protocol for the Control System in under study to be used.. for DAQ as alternative to the PCI board under development.. to integrate components that cannot be controlled with LabVIEW

21 Conclusions development of the Emittance-meter system is going on according to schedule critical components have been either ordered or ready to order studies for the Console System have been completed and the project specs have been given to the SPARC Control Group next step in Control System schedule is completion of software for E-meter components (motors, read-out,..) and DAQ preparation of bunch length experiment at TTF provided very good experience for the design of the SPARC measurement system


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