1. Sumary of the LKr WG R. Fantechi 31/8/2012

2. SLM readout restart First goal – Test the same configuration as in 2010 (rack 7-8 + TS) – All old power supplies not working, even the two for the clock distribution crates New power supplies moved to the crates in racks 7-8 + clock Need rethinking of the CPD layout for the Technical run – NA48 TS badly behaving 260 K triggers instead of 30, but with meaningful data No success in fixing it, even consulting Clemencic Decided to go directly to TALK connection – Tested with dummy receiver + logic state analyzer – Later with the readout of the LKr trigger receiver FIFO – Comparison with TS ok

3. Operation a la NA62 Trigger distributed via TALK – Only random triggers for the moment No implementation of a calibration trigger – First occasion to test the readout sw modified by Christina Timestamp matching, zero suppression, new format – Test almost completed, several small bugs fixed With random triggers no easy way to test the zero suppression feature Otherwise pedestal data have been readout from all the available CPDs in rack 7 and 8 Files available – A program by Christina to decode the new format has been implemented to make histograms and for a first evaluation of noise. – Run control interfaces tested almost complete – Timestamp readout program tested and started at sys startup

4. Looking forward the technical run CPD configuration – Move from the 5120 channel configuration to a 4096 one (64*64 cells around the center) This will leave one spare power supply See Giuseppe’s talk for the physics interest – Investigation will start for a possible use of the transceiver sums to have a coarse coverage of all the calorimeter 2*8 sums done analogically inside the transceivers The same type of cables to the CPD (but they are hidden below the false floor….) One additional CPD should host almost all the sums (512 out of 570, for the channels not read individually) Use the spare supply – Two main goals: Read the entire calorimeter in 2012 Have a way to check now if all the channels are ok: could be done later with an oscilloscope when the old system will be dismounted and the cables will be free. May be to late?

5. Looking forward the technical run Hardware – Install power supplies for the selected area – Change fuses – Configure the Fastbus branch structure accordingly – Test all CPDs and CPDAS cards and make repairs – Resurrect the CPD configuration database – Configure the calibration trigger – Adjust the delays for calibration and physics triggers – Configure the connections between SLMs and PCs – Configure the data output links on the SLM PCs – Commissioning of the new UPS for the readout The old broke down during the dry run… No way to repair it, just anticipate the installation of the new one. Software – Firmware adjustments for the trigger transmission – Tune the operation of slm_scheduler and rctoharness – Test the zero suppression mechanism – Little implementation of the timestamp distribution Add the transmission of the trigger word And consequently modify the class setup by Christina Get rid of the 9 fake triggers sent to the CPDs – Implement the protocol to receive L1 requests and transmit data – Implement the SLM decoding inside NA62Reconstruction – Monitor software

6. CREAM status Main focus at CAEN in the last months – Board layout & DDR3 simulation – To choose between 1 8GB DDR or 2 4GB DDR modules Impact on the board layout As the main access to the DDR is for small blocks, it is needed to check the timing – Decision taken for 1 DDR module PCB designers working all along August to develop the PCB Prototype at CERN not before mid October Still possible to have a test with beam – The daughter board layout and connections has been freezed – The communication firmware for the prototype will be the standard TCP/IP suite implemented on a NIOS processor But for the production we have to define the proper “fast” protocol to read data at L1 Activity at CERN – Crates and VM bridges ordered from CAEN – Prototype clock distribution board by end of august – Stefano Venditti at CERN in PH/ESE starting October 1 st

7. This means a 3.2  s window 128 samples written in the circular buffer in 1.5  s Evaluation to be completed with random L0/L1, now periodic

9. Daughter board PCB

10. LKr data from the technical run – Short discussion about the use of LKr data in the technical run Giuseppe reported what has presented today There is the possibility of getting good  +  0 events – Get the best energy and time resolution as possible – Discussion on the possibility to have a trigger better suited for LKr events Possibility to resurrect the neutral hodoscope (partial or full configuration depending on the LKr readout configuration) Cables are still available, HV board to be found, channels could be connected to the CHOD front end and/or a fast trigger could be implemented to be sent to the TALK board To be discussed again