1. FPGA System For Flash Memory Midterm Presentation Project B, Winter 2013, HSDSL Lab, Technion Supervisor: Amit Berman Students: Baruh Nurilov Eyal Amir

2. Flash Overview Very popular. Non-volatile. Small. Cheap. Uses.

3. Principles of Operation Floating gate. Programming by tunnel injection. Erasing by tunnel release.

4. Disadvantages Block erasure. Endurance. Errors.

5. WOM Code

6. Project Goal Designing a controller for flash memory that implements reading and writing with WOM code using FPGA. Assessing the advantages of writing to a flash memory using various WOM codes.

7. Overview Coded Data Retrieved Data

8. Block Diagram Encoding / Decoding Flash Interface SDRAM Interface SDRAM Flash Controller

9. The Controller PLL SDRAM Controller Shell Flash Controller Control Data

10. Flash Controller Implemented in Verilog. Two separate FSMs: o One for the flash. o One for the SDRAM controller. Flash FSM: o Master. o Read state chain. Calls SDRAM write state chain. o Write state chain. Calls SDRAM read state chain. o Erase state chain. SDRAM FSM: o Slave. o Read state chain. o Write state chain.

11. Encoding / Decoding Implemented in Java. Encoding: o Creates a file with random data. o Encodes the data with a given coding algorithm. o Returns a block sized file (2048KB). Decoding: o Preliminary comparison against the written file. o Decoding of read data. o Error detection in decoded data.

12. Progress Design flash and SDRAM interface units. Researching suitable WOM codes. Simulating the selected code. - 1 week. Designing the encoding/decoding unit. - 3 weeks. Synthesis. - 1 week. Testing. - 1 week.