1. Lec 4-2 Five operations of the machine cycle Fetch- fetch the next program instruction from memory. (PC+1); instruction to IR Decode- decode the instruction stored in the IR. Fetch- fetch the operand to the registers Execute- process the command. Store – write the results of the instruction into main memory.

2. Instruction Cycle Two steps: * Fetch * Execute

3. Fetch Cycle Program Counter (PC) holds address of next instruction to fetch Processor fetches instruction from memory location pointed to by PC Increment PC –Unless told otherwise Instruction loaded into Instruction Register (IR) Processor interprets instruction and performs required actions

4. Execute Cycle Processor-memory –data transfer between CPU and main memory Processor I/O –Data transfer between CPU and I/O module Data processing –Some arithmetic or logical operation on data Control –Alteration of sequence of operations –e.g. jump Combination of above

5. Example 1: Describe the sequence of events carried out during the machine cycle when executing the following instructions. AddressContents 500LDA 1000 501ADD 1001 502STO 1002 503JMP 510 10004 10016 1002

6. Instruction #1 LDA 1000 – Load to the accumulator the contents of the memory location 1000.

7. :::: 500501502503 LDA 1000 4 1000100110021003 6 ADD 1001STO 1002JMP 510 :::: :::: IR MAR MDR PC TMP ACC 500 CPU MM Address bus Data bus RW LDA 1000 Decode 501 10004 4 LDA 1000 4

8. Instruction #2 ADD 1001 – add the contents of location 1001 and the contents of the accumulator and store the result back in the accumulator.

9. :::: 500501502503 1000100110021003 6 ADD 1001STO 1002JMP 510 :::: :::: IR MAR MDR PC TMP ACC 501 CPU MM Address bus Data bus RW 502 1001 4 LDA 1000 4 ADD 1001 Decode 6 6 6 10 Add

10. Instruction #3 STO 1002 – store the contents of the accumulator to the memory location 1002.

11. :::: 500501502503 1000100110021003 6 ADD 1001STO 1002JMP 510 :::: :::: IR MAR MDR PC TMP ACC 502 CPU MM Address bus Data bus RW 503 1002 LDA 1000 4 10 STO 1002 Decode 1002 10

12. Instruction #4 JMP 510 – Jump to memory location 510

13. :::: 500501502503 1000100110021003 6 ADD 1001STO 1002JMP 510 :::: :::: IR MAR MDR PC TMP ACC 503 CPU MM Address bus Data bus RW LDA 1000 4 Decode 10 JMP 510 504510

14. Example 2: Describe the sequence of events carried out during the machine cycle when executing the following instructions. AddressContents 100JMP 200 200MOV R1 R2Move the contents of register R2 to R1. 201STO 800 R1Store the contents of R1 in memory location 800.

15. AddressContentsComments 100JMP 200 200LDA 1000 201MPY 1001Multiply the contents of the Accumulator with the contents of the memory location 1001 and store the result back in the Accumulator. 202STO 1002 10005 100110 Example 3: