2. ICE-DIP Project: Research on data transport for manycore processors for next generation DAQs Aram Santogidis › 5/12/2014

3. Aram Santogidis – ICE-DIP Project 2

4. The points of my research Data Transfer › Move data fast to manycore processors › Develop easy to use intra/inter-machine communication interface › Study the trade-offs of related communication patterns and mechanisms › Conduct this research in the context of next generation DAQs 3

5. Distributed application for online processing 4 Storage Detector Processing Nodes CPU RAM OS APP Online Processing Cluster Network

6. Heterogeneous computing with manycore co-processors 5 CPU RAM OS APP Network CPU RAM OS APP OSOS OSOS

7. We need high efficient transport 6 CPU RAM OS APP CPU RAM OS APP OSOS OSOS RDMA IMC (intra-machine) Network

8. Data transport of ALFA/FairROOT and Xeon Phi 7 FairMQ ALFA / FairROOT O2O2 Xeon Phi

9. Boosted NanoMSG’s performance of Intra-machine communication 8 Host Co-Processor P w w w w w w w w w C PCIe NN_PIPELINE (Push/Pull) TCP (400MB/s) TCP INPROC IPC SCIF(5.7 GB/s) SCIF

10. NanoMSG extended with SCIF support 9 PAIR REQ/ REP PIPELINE BUS PUB/ SUB SURVEY API TCP IPC INPROC SCIF ?? SCALABILITY PROTOCOLS TRANSPORT PROTOCOLS C Runtime + OS APPLICATIONS

11. Future plans › Focus more on ZeroMQ › Develop a message-passing to RDMA mapping protocol › Study ALFA and O 2 › Experiment on infiniband hardware › Work on getting early access on KNL and OmniPath. 10