1. Chapter 1 Performance & Technology Trends

2. Outline What is computer architecture? Performance What is performance: latency (response time), throughput The performance equation Measuring performance Improving performance: parallelism, locality, Amdahl's law CPE 432 Computer Design 2

3. Chapter 1 — Computer Abstractions and Technology — 3 Response Time and Throughput Response time How long it takes to do a task Throughput Total work done per unit time e.g., tasks/transactions/… per hour How are response time and throughput affected by Replacing the processor with a faster version? Adding more processors? We’ll focus on response time for now…

4. Chapter 1 — Computer Abstractions and Technology — 4 Relative Performance Define Performance = 1/Execution Time “X is n time faster than Y” Example: time taken to run a program 10s on A, 15s on B Execution Time B / Execution Time A = 15s / 10s = 1.5 So A is 1.5 times faster than B

5. Chapter 1 — Computer Abstractions and Technology — 5 Measuring Execution Time Elapsed time Total response time, including all aspects Processing, I/O, OS overhead, idle time Determines system performance CPU time Time spent processing a given job Discounts I/O time, other jobs’ shares Comprises user CPU time and system CPU time Different programs are affected differently by CPU and system performance

6. Chapter 1 — Computer Abstractions and Technology — 6 CPU Clocking Operation of digital hardware governed by a constant-rate clock Clock (cycles) Data transfer and computation Update state Clock period Clock period: duration of a clock cycle e.g., 250ps = 0.25ns = 250×10 –12 s Clock frequency (rate): cycles per second e.g., 4.0GHz = 4000MHz = 4.0×10 9 Hz

7. Chapter 1 — Computer Abstractions and Technology — 7 CPU Time Performance improved by Reducing number of clock cycles Increasing clock rate Hardware designer must often trade off clock rate against cycle count

8. Chapter 1 — Computer Abstractions and Technology — 8 CPU Time Example Computer A: 2GHz clock, 10s CPU time Designing Computer B Aim for 6s CPU time Can do faster clock, but causes 1.2 × clock cycles How fast must Computer B clock be?

9. Chapter 1 — Computer Abstractions and Technology — 9 Instruction Count and CPI Instruction Count for a program Determined by program, ISA and compiler Average cycles per instruction Determined by CPU hardware If different instructions have different CPI Average CPI affected by instruction mix

10. Chapter 1 — Computer Abstractions and Technology — 10 CPI Example Computer A: Cycle Time = 250ps, CPI = 2.0 Computer B: Cycle Time = 500ps, CPI = 1.2 Same ISA Which is faster, and by how much? A is faster… …by this much

11. Chapter 1 — Computer Abstractions and Technology — 11 CPI in More Detail If different instruction classes take different numbers of cycles Weighted average CPI Relative frequency of instruction type i

12. Chapter 1 — Computer Abstractions and Technology — 12 CPI Example Alternative compiled code sequences using instructions in classes A, B, C ClassABC CPI for class123 IC in sequence 1212 IC in sequence 2411 Sequence 1: IC = 5 Clock Cycles = 2×1 + 1×2 + 2×3 = 10 Avg. CPI = 10/5 = 2.0 Sequence 2: IC = 6 Clock Cycles = 4×1 + 1×2 + 1×3 = 9 Avg. CPI = 9/6 = 1.5

13. Chapter 1 — Computer Abstractions and Technology — 13 Performance Summary Performance depends on Algorithm: affects IC, possibly CPI Programming language: affects IC, CPI Compiler: affects IC, CPI Instruction set architecture: affects IC, CPI, T clock The BIG Picture

14. Chapter 1 — Computer Abstractions and Technology — 14 Power Trends In CMOS IC technology §1.5 The Power Wall ×1000 ×30 5V → 1V

15. Chapter 1 — Computer Abstractions and Technology — 15 Reducing Power Suppose a new CPU has 85% of capacitive load of old CPU 15% voltage and 15% frequency reduction The power wall We can’t reduce voltage further We can’t remove more heat How else can we improve performance?

16. Chapter 1 — Computer Abstractions and Technology — 16 Uniprocessor Performance §1.6 The Sea Change: The Switch to Multiprocessors Constrained by power, instruction-level parallelism, memory latency

17. Chapter 1 — Computer Abstractions and Technology — 17 Multiprocessors Multicore microprocessors More than one processor per chip Requires explicitly parallel programming Compare with instruction level parallelism Hardware executes multiple instructions at once Hidden from the programmer Hard to do Programming for performance Load balancing Optimizing communication and synchronization

18. Chapter 1 — Computer Abstractions and Technology — 18 Manufacturing ICs Yield: proportion of working dies per wafer §1.7 Real Stuff: The AMD Opteron X4

19. Chapter 1 — Computer Abstractions and Technology — 19 AMD Opteron X2 Wafer X2: 300mm wafer, 117 chips, 90nm technology X4: 45nm technology

20. Chapter 1 — Computer Abstractions and Technology — 20 Integrated Circuit Cost Nonlinear relation to area and defect rate Wafer cost and area are fixed Defect rate determined by manufacturing process Die area determined by architecture and circuit design

21. Chapter 1 — Computer Abstractions and Technology — 21 SPEC CPU Benchmark Programs used to measure performance Supposedly typical of actual workload Standard Performance Evaluation Corp (SPEC) Develops benchmarks for CPU, I/O, Web, … SPEC CPU2006 Elapsed time to execute a selection of programs Negligible I/O, so focuses on CPU performance Normalize relative to a reference machine Summarized as geometric mean of performance ratios CINT2006 (integer) and CFP2006 (floating-point)

22. Chapter 1 — Computer Abstractions and Technology — 22 CINT2006 for Opteron X4 2356 NameDescriptionIC×10 9 CPITc (ns)Exec timeRef timeSPECratio perlInterpreted string processing2,1180.750.406379,77715.3 bzip2Block-sorting compression2,3890.850.408179,65011.8 gccGNU C Compiler1,0501.720.47248,05011.1 mcfCombinatorial optimization33610.000.401,3459,1206.8 goGo game (AI)1,6581.090.4072110,49014.6 hmmerSearch gene sequence2,7830.800.408909,33010.5 sjengChess game (AI)2,1760.960.483712,10014.5 libquantumQuantum computer simulation1,6231.610.401,04720,72019.8 h264avcVideo compression3,1020.800.4099322,13022.3 omnetppDiscrete event simulation5872.940.406906,2509.1 astarGames/path finding1,0821.790.407737,0209.1 xalancbmkXML parsing1,0582.700.401,1436,9006.0 Geometric mean11.7 High cache miss rates

23. Chapter 1 — Computer Abstractions and Technology — 23 SPEC Power Benchmark Used for web servers running Java Power consumption of server at different workload levels Performance: ssj_ops/sec (server-side Java operations per second ) Power: Watts (Joules/sec)

24. Chapter 1 — Computer Abstractions and Technology — 24 SPECpower_ssj2008 for X4 Target Load %Performance (ssj_ops/sec)Average Power (Watts) 100%231,867295 90%211,282286 80%185,803275 70%163,427265 60%140,160256 50%118,324246 40%920,35233 30%70,500222 20%47,126206 10%23,066180 0%0141 Overall sum1,283,5902,605 ∑ssj_ops/ ∑power493

25. Chapter 1 — Computer Abstractions and Technology — 25 Pitfall: Amdahl’s Law Pitfall: Improving an aspect of a computer and expecting a proportional improvement in overall performance §1.8 Fallacies and Pitfalls Can’t be done! Example: multiply operations account for 80s of a 100s run time of a program How much improvement in multiply performance to get the program to run 5 times faster (i.e. in {100/5} = 20s)? Corollary: make the common case fast

26. Amdahl’s Law Chapter 1 — Computer Abstractions and Technology — 26 Best you could ever hope to do:

27. Amdahl’s Law example Chapter 1 — Computer Abstractions and Technology — 27 New CPU 10X faster I/O bound server, so 60% time waiting for I/O Apparently, its human nature to be attracted by 10X faster, vs. keeping in perspective its just 1.6X faster

28. Amdahl’s Law example: Make the common case fast Chapter 1 — Computer Abstractions and Technology — 28 Fraction = 0.1, Speedup = 10 Fraction = 0.9, Speedup = 10

29. Chapter 1 — Computer Abstractions and Technology — 29 Fallacy: Low Power at Idle Look back at X4 power benchmark At 100% load: 295W At 50% load: 246W (83%) At 10% load: 180W (61%) Google data center Mostly operates at 10% – 50% load At 100% load less than 1% of the time Consider designing processors to make power proportional to load

30. Chapter 1 — Computer Abstractions and Technology — 30 Pitfall: MIPS as a Performance Metric MIPS: Millions of Instructions Per Second Doesn’t account for Differences in ISAs between computers Differences in complexity between instructions CPI varies between programs on a given CPU

31. Chapter 1 — Computer Abstractions and Technology — 31 Concluding Remarks Cost/performance is improving Due to underlying technology development Hierarchical layers of abstraction In both hardware and software Instruction set architecture The hardware/software interface Execution time: the best performance measure Power is a limiting factor Use parallelism to improve performance §1.9 Concluding Remarks