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Published byJohn Cox Modified over 8 years ago
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박 유 진
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Short RF Range(~10m) Reduce range by obstruction Low data rate(1Mbps) Normal Audio data rate : 1.5 Mbps CD Quality Audio data rate : 2.0 Mbps 2
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Features Reference Data Fundamental Operation Data Flow and Organization Mode and Interface Audio Transmitter(ATX) Audio Receiver(ARX) Common Block ATX and ARX Operation Overview Register Map QoS(Quality of Service) Engine Register update 3
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Low cost 0.18u CMOS, 36pin 6 x 6mm QFN Package, single chip RF Transceiver 4Mbps RF link 48ksps sample rate/16,24bit Programmable latency QoS engine for audio streaming S/PDIF interface for PC Soundcard & surround receivers I2S interface for glue-less audio support SPI / 2wire interface 4
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On chip audio compression(24bit to 16bit) On chip voltage regulator Uses global 2.4GHz band Application CD quality headset Speakers Surround Speakers Microphone Etc… 5
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ParameterValueUnit Minimum supply voltage2.0V Temperature range-20 to +80°C Peak supply current in transmit -5dBm output power 15mA Peak supply current in receive mode32mA Supply current in power down mode5mA Maximum transmit output power0dBm Audio sample rate8 to 48kSPS Audio resolution16Bit Receiver sensitivity-80dBm 6
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Two mode Operation ATX(audio transmitter) mode ARX(audio receiver) mode Two data Channel Audio Channel(audio Packet Transmission) Control Channel(ACK Packet Transmission) 7
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nRF24Z1 data streaming principle 8
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Data Packet(ATX) 16 stereo samples(SS). Preamble, recipient address, Packet id, compression information, CRC Control & register data (external devices connected to receiver can be controlled by input to the ATX) ACK Packet(RTX) Acknowledge information Requesting retransmission packets Control and status information 10
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I2S(Inter-IC Sound) audio input Consist of pins CLK, DATA and WS Sample rates : 8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48 kSPS 16 / 24 bit format S/PDIF(Sony/Philips Digital Interconnect Format) audio input Input on pin SPDIO Sample rates : 32, 44.1, 48kSPS 16 / 20 / 24 bit format -> 16 bit compression IEC958 type2,3 13
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Slave interface MCU connected to Slave interface SPI(SSEL =0), 2-wire(SSEL =1) Master interface EEPROM or FLASH memory connected to master interface Support SPI or 2-wire If a memory is present, device read configuration data from the memory 14
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Direct data input pin Digital input(GPIO) DD[1:0] If SSEL = 1(2-wire) DD[2:0] Interrupt output IRQ based interrupt(i.e. no audio input detected, loss of RF communication etc.) 15
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GPIO interface( No MCU) 16
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Slave interface(Use MCU) 17
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I2S audio output 8,11.025, 12, 16, 22.05, 24, 32, 44.1, 48 kSPS 16 bit format S/PDIF audio output 32, 44.1, 48 kSPS 16/24 bit format 18
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Slave interface MCU connected to Slave interface SPI(SSEL =0), 2-wire(SSEL =1) Master interface EEPROM or FLASH memory connected to master interface Support SPI or 2-wire If a memory is present, device read configuration data from the memory After link established, audio transmitter can control Master interface(SPI) 19
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Parallel port Alternatively to the serial slave interfaces 4 input port DI[3:0] 4 output port DO[3:0] provide a PWM signal(DO[3:0]) 20
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XTAL Oscillator(16MHz) Radio Transceiver high speed streaming(4Mbps) transceiver interface 2.4GHz ShockBurst™ Transceiver QoS(Quality of Service) engine control output power Power supply regulator Audio compression / decompression 24bit sample to be compressed to a 16bit format Removing the LSB in the sample 21
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Power on – reset If external memory is present, configuration data is loaded from external memory(API / 2 wire) If no external memory is present, external MCU must configure nRF24Z1 through the slave SPI or 2-wire serial interface 22
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Link locate state Initialization or ATX and ARX link Broken ATX sending short search packet on all channel until an acknowledge signal received from ARX ARX listening for incoming search packet on all channel 23
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Synchronization state If RF link established between ATX and ARX, synchronize the frequency hopping engine on ATX and ARX(hopping sequence) Idle state If RF link established and synchronized, nRF24Z1 enter idle state 24
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I2S interface Left justified I2S Right justified S/PDIF interface Linear PCM Audio as described in IEC 60958-3 (2 channel Stereo) Non-Linear PCM Audio as described in IEC 61937-1 and IEC 61937-2 (Surround Channel Stereo) 25
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Register map in external EEPROM Minimum EEPROM size : 128 bytes Must be put in EEPROM byte n+3 28
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Ensure robust communication in an audio streaming application RF protocol features Data Frame consist of RF address, payload, CRC Packet loss or received with error, retransmitted from ATX in the next frame Use Adaptive Frequency Hopping Algorithm Management RF link Monitoring RF link constantly If lost link, run a link initialization or reconnect 29
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Part of QoS engine functionality Frequency Hopping table 30
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Link Quality monitoring 31
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Latency Output power 32
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Deliver interrupt to any external system connected to pin IRQ INTSTA : interrupt flag Register INTCF : interrupt configure Register Available interupt Link Broken Poor link Link error Remote transfer done GPIO change Wakeup from power down 33
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ATX MCU can update audio receiver control register via the control channel TXCSTATE : Send ATX register to ARX via control channel LNKCSTATE : Send LINK control register to ARX via control channel RXCSTATE : Send ARX status register to ARX via control channel RXEXEC : Sent RXBUF to ARX via serial interface After transfer done, remote transfer done interrupt flag will be set. 35
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