1. EE/CS 480 Spring 2008 1February, 2008 University of Portland School of Engineering Project Golden Eagle Fast Fourier Transform Processor Team Sandra Pellecer Neil Tuttle Ziyuan Zhang Advisor Dr. Inan, Dr. Osterberg Industry Representative Mr. David Dunning Intel

2. EE/CS 480 Spring 2008 2February, 2008 University of Portland School of Engineering Overview Introduction Scorecard Additional Accomplishments Plans Issues/Concerns Conclusions

3. EE/CS 480 Spring 2008 3February, 2008 University of Portland School of Engineering Introduction MOSIS chip to perform FFT algorithm Designed to improve speed of digital signal processing Applicable in all areas involved with digital signal processing

4. EE/CS 480 Spring 2008 4February, 2008 University of Portland School of Engineering Chip Block Diagram

5. EE/CS 480 Spring 2008 5February, 2008 University of Portland School of Engineering Chip 1 B 2 Logic Layout

6. EE/CS 480 Spring 2008 6February, 2008 University of Portland School of Engineering Chip 1 L-EDIT Layout

7. EE/CS 480 Spring 2008 7February, 2008 University of Portland School of Engineering Chip 1 Pinout

8. EE/CS 480 Spring 2008 8February, 2008 University of Portland School of Engineering Chip 2 B 2 Logic Layout

9. EE/CS 480 Spring 2008 9February, 2008 University of Portland School of Engineering Chip 2 L-EDIT Layout

10. EE/CS 480 Spring 2008 10February, 2008 University of Portland School of Engineering Chip 2 Pinout

11. EE/CS 480 Spring 2008 11February, 2008 University of Portland School of Engineering System Block Diagram

12. EE/CS 480 Spring 2008 12February, 2008 University of Portland School of Engineering Flowchart

13. EE/CS 480 Spring 2008 13February, 2008 University of Portland School of Engineering Prototype Schematic

14. EE/CS 480 Spring 2008 14February, 2008 University of Portland School of Engineering Scorecard Theory of Operations 1.0 (2/12/08)

15. EE/CS 480 Spring 2008 15February, 2008 University of Portland School of Engineering Additional Accomplishments Wire-wrapped CPLDS and reprogrammed them RS232 Communication (PIC) I 2 C Communication (PIC)

16. EE/CS 480 Spring 2008 16February, 2008 University of Portland School of Engineering Plans Microprocessor programming –Test LCD –Interface CPLD with PIC –A/D Converter CPLD digital logic simulation and testing Wait for MOSIS chips –ETA around spring break.

17. EE/CS 480 Spring 2008 17February, 2008 University of Portland School of Engineering Milestones (Fall) Functional Spec 1.010/5/200710/12/200710/5/2007 Project Plan 0.910/26/2007 Project Plan 1.011/9/2007 Send design to MOSIS11/22/2007 11/9/2007 Theory of Operations approval 2/22/2008 NumDescription Original 10/30/07 Previous 11/27/07 Present 02/05/2008 1Product Approval09/07/2007 2Functional Spec 0.909/21/2007 3Completed Chip 109/24/2007 4Functional Spec 1.010/05/2007 5Completed Chip 210/24/2007 6Project Plan 0.910/26/2007 7Project Plan 1.011/09/2007 8Send design to MOSIS11/22/2007 9Design Review12/04/2007 10Check LCD functionality12/04/2007 11Convert C1 to ABEL01/20/2008 12/18/2007 12Convert C2 to ABEL01/31/2008 12/24/2007

18. EE/CS 480 Spring 2008 18February, 2008 University of Portland School of Engineering Milestones (Spring) Functional Spec 1.010/5/200710/12/200710/5/2007 Project Plan 0.910/26/2007 Project Plan 1.011/9/2007 NumDescription Original 10/30/07 Previous 11/27/07 Present 02/05/08 13FW: RS232 functional2/10/2008 2/19/2008 14Theory of Operations2/22/20082/15/20082/12/2008 15Prototype completed2/29/2008 16FW: Graphics functional3/10/2008 17Final firmware revision3/31/2008 3/10/2008 18MOSIS chip function testing3/18/2008 19Final project assembly3/28/2008 20Presentation PPT Completed4/6/2008 21Founder’s Day4/8/2008 22Postmortem4/23/2008 23Final Report4/25/2008

19. EE/CS 480 Spring 2008 19February, 2008 University of Portland School of Engineering Concerns/Issues Might discover errors during CPLD testing –If there is a problem with the MOSIS chips, we will use the CPLDs instead.

20. EE/CS 480 Spring 2008 20February, 2008 University of Portland School of Engineering Conclusions In Progress: Continue working on PIC firmware and CPLD testing. Questions?