1. Stefan Ritt Data Acquisition for 22 Oct 2013Fukuoka MEGup MEG2 MEG’ MEGng

2. Reminder for new DAQ system 22 Oct 2013FukuokaPage 2 Increased channel density requires merge of DAQ+TRIGGER New WaveDREAM boards (WDB) Variable Gain Amplifier Integrated HV biasing MCX connector DRS4 + Trigger New crate standard Data concentrator boards (DCB) Trigger concentrator boards (TCB)

3. WaveDREAM2 block schematics old 22 Oct 2013FukuokaPage 3

4. WaveDREAM2 block schematics new 22 Oct 2013FukuokaPage 4

5. New crate standard 22 Oct 2013FukuokaPage 5 3 HE 19” crates Custom backplane Venting from front to back half height backplane → no dead space 16 DAQ boards (256 channels) One power supply (24V) One Data Concentrator Board GBit Ethernet Global Clock Input Trigger bus One Trigger Concentrator Board Interface to Type 2 trigger boards Crate control through MSCB

6. WaveDAQ system 22 Oct 2013FukuokaPage 6 New functionality: Separate DCB & TCB SPI to TCB SERDES for WDB Flash programming through backplane Hot swap functionality MSCB node temperature fan speed voltages, current power cycle

7. Backplane pin assignment 22 Oct 2013FukuokaPage 7 WDBTCB PSI DAQ board (cPCI Serial) Preliminary!

8. Backplane routing 22 Oct 2013FukuokaPage 8 “Dual Star” topology similarly to VXS standard 35 mm vertical routing space 500 μm / differential pair 70 pairs / plane ~180 pairs needed → 3 signal planes → 8 layer board VXS standard Fan Ethernet

9. PCB Layout 22 Oct 2013FukuokaPage 9 June 2013 Oct 2013

10. WaveDREAM2 board 22 Oct 2013FukuokaPage 10

11. Overall system 22 Oct 2013FukuokaPage 11 “Osaka system” uses 35 PCs (70-90 kCHF):

12. Putting the PC on the DCB Xilinx Zynq 7000 series has new processor inside the FPGA ARM Cortex-A9 866 MHz (XC7Z020) 2 cores with FPU 1 GB RAM interface DDR3 SD card interface (boot) runs Linux 162 US$ (XC7Z020) Processing power should be sufficient 256 vs. 600 channels per PC DSP slices in FPGA can be used as co-processor for calibration and zero suppression MIDAS front-end can run inside the FPGA Opportunity for alternative overall system layout 22 Oct 2013FukuokaPage 12

13. New overall system layout 22 Oct 2013FukuokaPage 13 Eval Board US$ 395,- Eval Board US$ 395,- No FE PCs: save 70-90 kCHF

14. Subdetector# Channels# WD Boards# CratesCost [kCHF] XEC SIPMs409225616557 XEC PMT63040390 pixTC1200755165 DC276017211376 DC 2  2*1920-2760=1080684147 (120 k€) Total8682543351190 Current cost estimate (w/o trigger & cables) 22 Oct 2013FukuokaPage 14 ItemCost [kCHF] WD board1.8 DC board2 Crate4 140 CHF / channel 115 EUR / channel 15.2 kJPY / channel 140 CHF / channel 115 EUR / channel 15.2 kJPY / channel

15. Major delay in WDB design “HW ready by fall 2012” → end 2013 Change of CAD system Work of engineer (Ueli) for XEC group Stability of dense, single ended, gain 100 preamplifier (several prototypes built and tested, Lecce group did not succeed for drift chamber) New features shaping amplifier timing calibration of individual channels remote firmware upgrade & reboot hot swap functionality Change of FPGA (no GTP for DCB) Restriction in FPGA pin usage (clocks for serial lines only on certain pins, LVDS outputs restricted) → re-lay out General under-estimation of complexity of this board Schedule delay 22 Oct 2013FukuokaPage 15

16. Basically one year delay since Osaka ‘12 schedule If everything now goes well, working crate end of ‘14 and fully system end of ‘15 Critical parts are finished, rest is digital electronics (less trouble expected, except SERDES → Trigger Group) → error bar maybe 6-9 months Schedule 22 Oct 2013FukuokaPage 16 201320142015 WDB Prototype WDB Firmware Crate design Redesign (opt) DCB design & protot. DCB firmware Working crate Full crate (256 chn.) Complete system WDB (2-3 samples @ 16 chn.) TCB

17. MEG2 requires technical coordination Area layout Hut layout Electronics layout (less critical) Cable routing Slow control Coordination means additional work Missing coordination can cause trouble double allocation of space, racks, cable trays unnecessary work (two network cables routed to the same place) not enough power supply Everybody has to contact coordinators for new devices, cables, etc. Review for larger items, safety review with PSI officials if necessary CMS: Whole group for technical coordination at the same level as physics coordination with own budget Find right level of coordination, should not be “overdone” Technical Coordination 22 Oct 2013FukuokaPage 17

18. Area inspection last month by PSI electricians Complaints about our cabling, request to redo it Have to follow, otherwise experiment can be shut down Proposal: Do it with the help of professional electricians Install patch panels, distribution boxes etc. Planned for spring 2014 Requested that technician speaks English Costs will be covered by PSI (MEG) Need support from XEC group Cabling in area 22 Oct 2013FukuokaPage 18 needs shielding can drop messy clean

19. Technical Coordination 22 Oct 2013FukuokaPage 19 Should we have technical coordination? Who will do it? (people should be mainly at PSI) 1.Area outside hut & cavern 2.Inside detector hut 3.Electronics 4.Slow control Come up with a set of guidelines (as for run coordination), to be endorsed and followed by the whole collaboration XEC, PRK ? MH & technicians ? TRG, SR SR