1. Generic and Re-usable Developments for Online Software Slow Control, Configuration, Data Format & Online Processing Shebli Anvar, CEA Irfu January 12, 2011

2. 11 engineers + 1 technician 11 engineers + 1 technician All types of software development All types of software development – Non Real Time HEP frameworks (LHC experiments, Antares, …) Astrophysics frameworks (Herschel, Svom, …) Physics simulations (cosmology, plasma physics, HEP, …) Detector simulations (Geant4, …) … – Real Time / Online Embedded / FPGA driver software Configuration, Control & Monitoring Data acquisition and online processing GUIs … – Other software related activities Development tools (Subversion, IDE, …) Web portal management … Shebli ANVAR, CEA Irfu –12 January 2011 4 engineers 3 on generic frameworks

3. Antares / KM3NeT (underwater neutrino telescope) Antares / KM3NeT (underwater neutrino telescope) – SCOTT ASIC test bench – Offshore data acquisition system – Slow control and configuration Svom (Gamma ray burst satellite and telescopes) Svom (Gamma ray burst satellite and telescopes) – Ground segment GRB alert evaluation and dispatch – Eclair gamma detector test bench (TRAPS lab) T2K Test bench + many other projects using AFTER electronics in particle physics, astrophysics and nuclear physics T2K Test bench + many other projects using AFTER electronics in particle physics, astrophysics and nuclear physics Forfire (outdoors fire detection) Forfire (outdoors fire detection) GET GET Possibly: CLAS12, S3, GBAR, … Possibly: CLAS12, S3, GBAR, … Shebli ANVAR, CEA Irfu –12 January 2011

4. Offline Processing StorageStorage Online Processing Readout & formatting Digitization Detection Channel Configuration and Control MonitoringMonitoring Buffering & Routing Hardware Firmware Software Control Flow Data Flow

5. Network Shebli ANVAR, CEA Irfu –12 January 2011 Hardware Firmware Software Digitization (ASIC+ADC+…) Control Flow Data Flow Readout & Formatting Memory Circular Buffering Data Routing Online Processing Data Storage Network Hardware Specific

6. Shebli ANVAR, CEA Irfu –12 January 2011 FPGA Embedded Processor RAM Ethernet 100 Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip Digitization Digitization (ASIC+ADC+…) Allows use of standard multi-Gb switches for data concentration and routing

7. Shebli ANVAR, CEA Irfu –12 January 2011 FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip Ethernet Gb Network Switch FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip Computer Farm Data Flow

8. FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip Ethernet Gb Network Switch FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip Computer Farm Embedded Nodes Shebli ANVAR, CEA Irfu – Eurorib'10 – 8 June 2010 Intrinsic Parallelism Performance Parallelism Computing nodes Standard Network Switching Detection nodes

9. Shebli ANVAR, CEA Irfu –12 January 2011 Global Network Data Server Offline Analysis External Systems Control & Monitoring FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip Ethernet Gb Network Switch FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip FPGA Embedded Processor RAM Control (I2C, etc.) Ethernet 1000 Memory bus System on Chip Computer Farm Embedded Nodes Control Flow Data Flow

10. Provide for easy software integration Provide for easy software integration – Tools for integration of subsystems configurations – Use Client-Server architecture supported by multi- language middleware – Define interfaces using a formal language (WSTL, Slice, Corba IDL…) Accomodate multiple test benches / integration sites Accomodate multiple test benches / integration sites – Automatically share common information through central DB (e.g. calibration values) – Provide for easy DB access Shebli ANVAR, CEA Irfu –12 January 2011

11. Middleware for distributed multi-language control and configuration (ZeroC Ice, SOAP/ Web service, …) Middleware for distributed multi-language control and configuration (ZeroC Ice, SOAP/ Web service, …) Middleware / framework for distributed fast data acquisition (Bare TCP/IP, Optimized ZeroC Ice, …) Middleware / framework for distributed fast data acquisition (Bare TCP/IP, Optimized ZeroC Ice, …) Remote control, configuration and monitoring (Google Web Toolkit, Qt+ZeroC Ice, …) Remote control, configuration and monitoring (Google Web Toolkit, Qt+ZeroC Ice, …) Distributed access to configuration and run conditions through database. Distributed access to configuration and run conditions through database. Shebli ANVAR, CEA Irfu –12 January 2011

12. Network EmbeddedEmbedded EmbeddedEmbedded

13. Network EmbeddedEmbedded EmbeddedEmbedded Expose server interface – Remote register concept – Client notification – Slow control data readout Communication middleware (ICE) Communication Communication middleware (ICE + SOAP)

14. Shebli ANVAR, CEA Irfu –12 January 2011 Expose server interface – Remote register concept – Client notification – Slow control data readout ICE Interface & data definitions Embedded (VxWorks) C++ library Host (Linux) C++ library ICE Interface & data definitions Embedded (VxWorks) C++ library Host (Linux) C++ library Node (network) Device (Mem, SPI…) * EC Core * RegisterRegister * Bit Field *

15. Shebli ANVAR, CEA Irfu –12 January 2011 Expose server interface – Remote register concept – Client notification – Slow control data readout Node (network) Device (Mem, SPI…) * EC Core * RegisterRegister * Bit Field * Use of C++ templates for register data type (byte width) register data type (byte width) register access policy register access policy Use of C++ templates for register data type (byte width) register data type (byte width) register access policy register access policy memory map, SPI, simulator, etc.

16. Shebli ANVAR, CEA Irfu –12 January 2011 Node (network) Device (Mem, SPI…) * EC Core * RegisterRegister * Bit Field * Web browser Application Server GWT ICE Java Generated Javascript C++ template ICE

17. Shebli ANVAR, CEA Irfu –12 January 2011

18. Config ID Config save/restore Configurations – C++ Framework (Host & embedded) – Multilanguage server access (using ICE) – Java wrappers – Automatic Config Tree  DB mapping – Automatic association with RUN ID

19. Shebli ANVAR, CEA Irfu –12 January 2011 Automatic association with RUN ID

20. Shebli ANVAR, CEA Irfu –12 January 2011 Multiframe Metaformat Multiframe Metaformat – Generic, versionable DAQ data format – Provides for format evolution – C++ implementation – Java implementation? – Description “language” + code generation?

21. Think reuse Think reuse – Use open source frameworks – Design your own software as a framework and patterns – Professionalize your code (versioning, doc, build system, etc.) – Provide for (foresee) multiple platforms – Try pattern reuse with software interfaced firmware Think flexible Think flexible – Design functionalities as services to clients – Base your design on OO components – Provide for multiple languages (esp. middleware) – Integrate many simple frameworks (one for every aspect) rather than relying on a big one Shebli ANVAR, CEA Irfu –12 January 2011

22. CompounConfig C++ / Java Framework (100% - Doc: 80%) CompounConfig C++ / Java Framework (100% - Doc: 80%) – Flexible advanced configuration tool – Both file and DB mappings for persistence – Graphical configuration editing – Run conditions database MDaq Framework (70% - Doc: 10%) MDaq Framework (70% - Doc: 10%) – Distributed electronics control (remote register access) – Dynamic development through configuration (no recompilation) – Multilanguage acess (C++, Java, Python, etc.) – Multiframe metaformat (backward & forward compatible data format) KDaq Framework (70% - Doc: 10%) KDaq Framework (70% - Doc: 10%) – Re-usable scalable DAQ processes (Data routing, Farm processing, Scalable storage, Run control GUI, Web GUI) Shebli ANVAR, CEA Irfu –12 January 2011 Today’s distribution mode: ask me for a tarball (s.anvar@cea.fr) Licencing: GPL-like Cecill (special contract for proprietary licencing) Today’s distribution mode: ask me for a tarball (s.anvar@cea.fr) Licencing: GPL-like Cecill (special contract for proprietary licencing)