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CSNSM Orsay Micro-Electronics Groups Associated P. Barrillon, S. Blin, S. Callier, S. Conforti, F. Dulucq, J. Fleury, C. de La Taille, G. Martin- Chassard,

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Presentation on theme: "CSNSM Orsay Micro-Electronics Groups Associated P. Barrillon, S. Blin, S. Callier, S. Conforti, F. Dulucq, J. Fleury, C. de La Taille, G. Martin- Chassard,"— Presentation transcript:

1 CSNSM Orsay Micro-Electronics Groups Associated P. Barrillon, S. Blin, S. Callier, S. Conforti, F. Dulucq, J. Fleury, C. de La Taille, G. Martin- Chassard, L. Raux, N. Seguin-Moreau, V. Tocut + Wei Wei from IHEP Beijing

2 Orsay, 4th July 2008 C. de La Taille - Administration Council 2 General presentation and context Technical report Administrative report

3 Orsay, 4th July 2008 C. de La Taille - Administration Council 3 Microelectronics at in2p3 Large force of microelectronics experienced engineers (~40) Expertise in detectors, connectics, chip design and test Experience in designing and building large trackers Common Cadence tools Actions : –Building blocks –Networking –poles

4 Orsay, 4th July 2008 C. de La Taille - Administration Council 4 Motivation for poles Continuous increase of chip complexity (SoC, 3D…) Importance of critical mass –Daily contacts and discussions between designers –Sharing of well proven blocks –Cross fertilization of different projects Creation of poles at in2p3 –OMEGA at Orsay –Strasbourg –Dipole Lyon-Clermont

5 Orsay, 4th July 2008 C. de La Taille - Administration Council 5 Mission Design of basic building blocks usable by all in2p3 labs for physics experiments Motivations –Target analog technology (0.35µm CMOS and SiGe AMS ) –Optimize ressources and competences within in2p3 –reduce developpement times –Increase visibility of in2p3 in microelectronics First results –2-3 runs /yr financed by in2p3 –Porquerolles workshop –Fruitful exchanges Club building blocks 0.35µm

6 Orsay, 4th July 2008 C. de La Taille - Administration Council 6 New club 130nm for tracking and 3D Networking : club 130nm created at VLSI workshop –Target common technology with CERN or other labs : IBM 130nm with CERN, Chartered 130nm (IBM compatible) 3D consortium : CPPM, IPHC, OMEGA, LPNHE –Complementarity –Task sharing –Coordination IN2P3 Recommendation : participate to 3D effort in a coherent, coordinated and funded way.

7 Orsay, 4th July 2008 C. de La Taille - Administration Council 7 HARDROC Orsay Micro-Electronics Groups Associated A strong team of 10 ASIC designers… –= 20% of in2p3 designers –= 60% of department research engineers –A team with critical mass : pole created in 2007 = OMEGA –Expertise in low noise, low power high level of integration ASICs –2 designers/ project –2 projects/designer –Regular design meetings …Within an electronics department of 55 –Support for tests, mesaurements, PCBs… A steady production –A strong on-going R&D –Building blocks SiGe 0.35µm SKIROC MAROC 2 SPIROC ASPIC

8 Orsay, 4th July 2008 C. de La Taille - Administration Council 8 Orsay micro-electronics team 8 research engineers (1 IR0, 2 IR1, 5 IR2) 1 CDD IR2 EUDET 1 phD student 1 visitor from China IHEP Beijing

9 Orsay, 4th July 2008 C. de La Taille - Administration Council 9 General presentation and context Technical report Administrative report

10 Orsay, 4th July 2008 C. de La Taille - Administration Council 10 Recent chips Several chips developped for ATLAS LAr, OPERA, LHCb, CALICE in BiCMOS 0.8µm and installed on experiments Turn to Silicon Germanium 0.35 µm SiGe BiCMOS technology in 2005 Readout for MaPMT and ILC calorimeters Very high level of integration : System on Chip (SoC) Parallel activity of building blocks SKIROC MAROC 2 HARDROCSPIROCASPIC

11 Orsay, 4th July 2008 C. de La Taille - Administration Council 11 MAROC : 64 ch MAPMT chip for ATLAS lumi Complete front-end chip for 64 channels multi-anode photomultipliers –Auto-trigger on 1/3 p.e. at 10 MHz, 12 bit charge output –SiGe 0.35 µm, 12 mm2, Pd = 350mW PMF Hold signal PM 64 channels Photons Variable Gain Preamp. Variable Slow Shaper 20-100 ns Bipolar Fast Shaper Unipolar Fast Shaper Gain correction 64*6bits 3 discris thresholds (3*12 bits) Multiplexed Analog charge output LUCID S&H 3 DACs 12 bits 80 MHz encoder 64 Wilkinson 12 bit ADC 64 trigger outputs (to FPGA) Multiplexed Digital charge output 64 inputs S&H

12 Orsay, 4th July 2008 C. de La Taille - Administration Council 12 Active board pictures MAROC side Lattice side 64 ch PMT MAROC2 chip bounded at CERN

13 Orsay, 4th July 2008 C. de La Taille - Administration Council 13 MAROC Efficiency curves

14 Orsay, 4th July 2008 C. de La Taille - Administration Council 14 ILC Challenges for electronics Requirements for electronics –Large dynamic range (15 bits) –Auto-trigger on ½ MIP –On chip zero suppress –Front-end embedded in detector –Ultra-low power : («25µW/ch ) –10 8 channels –Compactness « Tracker electronics with calorimetric performance » No chip = no detector !! ATLAS LAr FEB 128ch 400*500mm 1 W/ch FLC_PHY3 18ch 10*10mm 5mW/chILC : 25µW/ch W layer ASIC Ultra-low POWER is the KEY issue Si wafers

15 Orsay, 4th July 2008 C. de La Taille - Administration Council 15 The front-end ASICs : the ROC chips SPIROC Analog HCAL (SiPM) 36 ch. 32mm² June 07 HARDROC Digital HCAL (RPC, µmegas or GEMs) 64 ch. 16mm² Sept 06 SKIROC ECAL (Si PIN diode) 36 ch. 20mm² Nov 06 Technological prototypes : full scale modules (~2m) EUDET EU funding (06-09) ECAL, AHCAL, DHCAL B=5T

16 Orsay, 4th July 2008 C. de La Taille - Administration Council 16 DHCAL chip : HaRDROC Hadronic Rpc Detector Read Out Chip (Sept 06) –64 inputs Preamp Shaper 2 discris Memory Full power pulsing –Compatible with 1st and 2nd generation DAQ : token ring readout of up to 100 chips –First test of 2 nd generation DAQ –First test detector integration Collaboration with IPNL/LLR/Madrid/Protvino –1m 3 scalable detector –Production of 5000 chips in 2009

17 Orsay, 4th July 2008 C. de La Taille - Administration Council 17 HaRDROC architecture Variable gain (6bits) current preamps (50ohm input) One multiplexed analog output (12bit) Auto-trigger on ½ MIP Store all channels and BCID for every hit. Depth = 128 bits Data format : 128(depth)*[2bit*64ch +24bit(BCID)+8bit(He ader)] = 20kbits Power dissipation : 1.5 mW/ch (unpulsed)- > 15µW with 1% cycle Large flexibility via >500 slow control settings

18 Orsay, 4th July 2008 C. de La Taille - Administration Council 18 30 fC 10 fC Pedestal Dac unit Channel number S-curves of 64 channels 10 bit DAC for threshold Noise ~ 1 UDAC (2mV) Pedestal dispersion : 0.4 UDAC rms Gain dispersion 3% rms Crosstalk : < 2% 50% trigger versus channel number

19 Orsay, 4th July 2008 C. de La Taille - Administration Council 19 SKIROC for W-Si ECAL Silicon Kalorimeter Integrated Read Out Chip (Nov 06) –36 channels with 15 bits Preamp + bi-gain shaper + autotrigger + analog memory + Wilkinson ADC –Digital part outside in a FPGA for lack of time and increased flexibility –Technology SiGe 0.35µm AMS. Chip received may 07 1 MIP in SKIROC

20 Orsay, 4th July 2008 C. de La Taille - Administration Council 20 Front-end board for ECAL PCB – FRONT PCB – BACK An ASU (Active Sensor Unit) VFE ASIC bonded in a PCB ASIC buried in the PCB ASU stitching : zero thickness connection No component  All features embedded in ASIC

21 Orsay, 4th July 2008 C. de La Taille - Administration Council 21 FEV5 : new PCB for ECAL Physical prototype Global dimensions : 180*180 mm, thickness 1.2mm pixel dimensions : 4*4 mm 0.15mm <depth<0.17mm 0.6mm< depth<0.7mm

22 Orsay, 4th July 2008 C. de La Taille - Administration Council 22 12 bit Wilkinson ADC performance Noise in low gain shaper rms = 0.9UADC (330µV) MIP =3 UADC 1050 1080 Noise in high gain shaper rms = 4UADC (1.4mV) MIP=30UADC Pedestal value vs Channel number Noise vs Channel number 4 5

23 Orsay, 4th July 2008 C. de La Taille - Administration Council 23 Second generation chip for SiPM SPIROC : Silicon Photomul. Integrated Readout Chip –36 channels –Charge measurement –Time measurement –Autotrigger on MIP or spe –Sparsified readout compatible with EUDET 2 nd generation DAQ –Chips daisy-chained –Pulsed power -> 25 µW/ch Fabricated in SiGe AMS 0.35 µm –Submitted in june 07 –Chip area : 30 mm2

24 Orsay, 4th July 2008 C. de La Taille - Administration Council 24 SPIROC main features Internal input 8-bit DAC (0-5V) for individual SiPM gain adjustment Energy measurement : 14 bits –2 gains (1-10) + 12 bit ADC 1 pe  2000 pe –Variable shaping time from 50ns to 100ns –pe/noise ratio : 11 Auto-trigger on 1/3 pe (50fC) –pe/noise ratio on trigger channel : 24 –Fast shaper : ~10ns –Auto-Trigger on ½ pe Time measurement : –12-bit Bunch Crossing ID –12 bit TDC step~100 ps Analog memory for time and charge measurement : depth = 16 Low consumption : ~25µW per channel (in power pulsing mode) Individually addressable calibration injection capacitance Embedded bandgap for voltage references Embedded 10 bit DAC for trigger threshold and gain selection Multiplexed analog output for physics prototype DAQ 4k internal memory and Daisy chain readout

25 Orsay, 4th July 2008 C. de La Taille - Administration Council 25 SPIROC : One channel schematic IN test

26 Orsay, 4th July 2008 C. de La Taille - Administration Council 26 DAQ ASIC Chip ID register 8 bits gain Trigger discri Output Wilkinson ADC Discri output gain Trigger discri Output Wilkinson ADC Discri output..… OR36 EndRamp (Discri ADC Wilkinson) 36 TM (Discri trigger) ValGain (low gain or high Gain) ExtSigmaTM (OR36) Channel 1 Channel 0 ValDimGray 12 bits … Acquisition readout Conversion ADC + Ecriture RAM RAM FlagTDC ValDimGray 12 8 ChipID Hit channel register 16 x 36 x 1 bits TDC ramp StartRampTDC BCID 16 x 8 bits ADC ramp Startrampb (wilkinson ramp) 16 ValidHoldAnalogb RazRangN 16 ReadMesureb Rstb Clk40MHz SlowClock StartAcqt StartConvDAQb StartReadOut NoTrig RamFull TransmitOn OutSerie EndReadOut Chipsat

27 Orsay, 4th July 2008 C. de La Taille - Administration Council 27 SPIROC performance Good analog performance –Single photo-electron/noise = 8 –Auto-trigger with good uniformity –Complex chip : many more measurements needed bug in the ADC necessitates an iteration

28 Orsay, 4th July 2008 C. de La Taille - Administration Council 28 ASPIC Multichannel CCD readout for LSST –Collab LAL-LPNHE –Test of Clamp&Sample or Dual Slope Integrator –Low noise (<5 e-) –Ultra low crosstalk (<0.01%) –Aim for a 16 channel chip

29 Orsay, 4th July 2008 C. de La Taille - Administration Council 29 Joël PouthasIPN Orsay “PMm2” (2006 – 2009), funded by the ANR : LAL, IPNO, LAPP and Photonis Replace large PMTs (20”) by groups of smaller ones (12”) – central 16ch ASIC (PaRISROC) –12 bit charge + 12 bit time –water-tight, common High Voltage –Only one wire out (DATA + VCC) –Target low cost –Reuse many parts from MAROC & SPIROC Application : large water Cerenkov neutrino –1ns time resolution –High granularity –scalability PMm 2 : large photodection area

30 Orsay, 4th July 2008 C. de La Taille - Administration Council 30 Based on a complete 16 channels read out chip with dedicated for Photomultiplier array (PARISROC) Characteristics : –16 inputs preamplifier Variable gain :1  8 (4bits) (common on 16 channels) PMTs gain adjustment by a factor 4 (8 bits) (channel by channel) Dynamic range : 0  300 pe (0  50pC) –16 trigger outputs: Fast shaper (=15ns) Low offset discriminator Threshold provided by common 10bit DAC + 4bit DAC /channel “NOR” of 16 triggers output –1 multiplexed charge output : Slow shaper with variable shaping time (=50ns,100ns,200ns) Good linearity (1%) T&H PArISROC specifications

31 Orsay, 4th July 2008 C. de La Taille - Administration Council 31 3D technology Increasing integration density, mixing technologies Wafer thinning to <50 µm Minimization of interconnects Large industrial demand –Processors, image sensors… ©A. Klumpp (IZM)

32 Orsay, 4th July 2008 C. de La Taille - Administration Council 32 Conclusion MAROC, HaRDROC, SKIROC, SPIROC… –4 complex ASICs prototyped in 2007 : 2 nd generation chips –SoC : System on chip (ADC, TDC, DAQ…) –Production in 2008 in a dedicated run ILC main customer –Many external requests –Long and difficult measurements… Coming up : 3D –CMOS 130nm –Basic analog tier for 3D integration in collaboration with CPPM Marseille aimed at 50x50µm pixels simple readout.

33 Orsay, 4th July 2008 C. de La Taille - Administration Council 33 General presentation and context Technical report Administrative report

34 Orsay, 4th July 2008 C. de La Taille - Administration Council 34 Collaboration LSST (2006-2010) ILC Si-W ECAL (2003-2020) ILC RPC-Fe DHCAL (2006-) ILC Scintillator (SiPM)-Fe AHCAL (2003-) ILC Scintillator (SiPM)-W ECAL(2005-) ATLAS luminometer ALFA (2003-2009) ATLAS luminometer LUCID (2005-2009) ATLAS tracker (2007-) Double Chooz (2007-2008) PMm² (2007-2010) SuperNemo Front-end (2008-) SuperNemo SNATS (2008-) SymbolX (2008-) North Auger (2004-2007) Medical imaging ISS Roma (2007-) Medical imaging INFN Pisa (2007-) Medical imaging IMNC (2007-2009) Balloon experiment Aachen (2008-) Generic detector R&D (2007-) Space telescope for EECR measurement (2006-) FJPPL (2006-) FCPPL (2007-)

35 Orsay, 4th July 2008 C. de La Taille - Administration Council 35 Collaboration  Commitments ATLAS luminometry: roman pots readout –MAROC2 for MultiAnode PMT [S. Blin] CALICE/EUDET ILC calorimeters readout ASICs –HaRDROC for RPC DHCAL (ANR 2007) [N. Seguin] –SKIROC for SiW ECAL (EUDET 2006-2009) [J. Fleury] –SPIROC for SiPM AHCAL (and japanese ECAL) (EUDET) [L. Raux] –Full production beg 2009 –Coordination of FP6 EUDET JRA3 (with S. Sefkow DESY) LSST : focal plane CCDs readout chip –ASPIC (collab LPNHE) [V. Tocut] PMM2 : ANR large area photodectors –PARISROC [G. Martin] ATLAS 3D tracker R&D

36 Orsay, 4th July 2008 C. de La Taille - Administration Council 36 Collaboration  External contracts European contract EUDET (2006-2010) –R&D for detectors at the ILC. Calorimetry : design of chips for ECAL, AHCAL and DHCAL. –36 ppm engineer + 130k€ chip foundries ANR PMm2 (2006-2009) –R&D for large arrays of photomyultipliers (“square meter PM”). –36 ppm engineer + 130k€ chip foundries ANR DHCAL (2007-2010) –R&D for a cubic meter digital hadron calorimeter at the ILC. –140k€ chip foundry for 5000 chips ANR vitesse (2008-2012) –3D electronics for trackers. R&D for ATLAS at SLHC.

37 Orsay, 4th July 2008 C. de La Taille - Administration Council 37 Collaboration  Requests MAROC2/3 –ATLAS LUCID detector (Bologna) –Double Chooz (Nevis USA) –PET imaging with PMT64 (ISS Roma) –Medical imaging with SiPM matrixes (INFN Pisa) –Air shower imaging (EHWA Seoul) HaRDROC –Medical imaging Trecam (IMNC Orsay) –Xray satellite (CSNSM Orsay) –Xray SiPM Balloon experiment (Aachen) SPIROC –SiPM readout (KEK Japan) ASPIC –CCD readout (Japan/New Zealand) PARISROC –SNEMO –MEdical imaging (INFN Pisa)

38 Orsay, 4th July 2008 C. de La Taille - Administration Council 38 Collaboration  International Joint Labs Japan : FJPPL (2006-) Collaboration with KEK group (M Tanaka) on ASIC R&D for megaton-like experiment linked to PMm². One Maroc test board supplied. China : FCPPL (2007-) Collaboration with IHEP (Beijing). One Chinese visitor for 6 months (1/2/08  31/7/08) on photomultiplier readout design. Collaboration on Parisroc and Building blocks. One Chinese PhD student (1/9/08  1/9/09).

39 Orsay, 4th July 2008 C. de La Taille - Administration Council 39 Manpower  Position in Omega - 2008 % ANREUIN2P3TOTAL PMm² 2006DHCAL 2007VITESSE 2008EUDET 2006LSSTSuperNemoATLAS LumiANR+EUIN2P3GRAND Pierre Barrillon 30703070100 Sylvie Blin 30703050100 Stéphane Callier 100 Selma Conforti 100 Frederic Dulucq 50 100 Julien Fleury 100 Christophe de La Taille 1525 10100 Gisèle Martin 25302025100 Ludovic Raux 100 Nathalie Seguin 5025 100 Vanessa Tocut 603090 Wei 25 50 TOTAL FTE 2.251.250.84.20.70.81.458.62.811.4

40 Orsay, 4th July 2008 C. de La Taille - Administration Council 40 Financial summary Omega operating budget That line is twofold. It funds Omega for its general operating needs (internal testboard, additional packaging, bonding, internal store covering, etc.) and it covers the equipment requirements (Die storage, computers, furniture, etc.) –2008 operating credits needed: 10 000 € –2008 operating credits granted: 0 € –2008 equipment credits needed:15 000€ –2008 equipment credits granted:0€ External services budget That line is used to embank invoices from products sold by Omega. It is also used to pay for the test boards and ASICs sold. It allows providing test boards for labs to test our ASICs and eventually start a collaboration if the ASICs correctly fit the experiment requirements. –2008 credits needed: 5 000 € –2008 credits granted: 0 € –2008 external resources30 000€ –2008 spent (1/7/08)25 000€ Travel assignment The mission assignment line is used to expense travels operated for pole aim, such as pole presentation or technical mission assignment for research promoting trade essentially for medical imaging. –2008 credits needed:15 000€ –2008 credits granted:0€ –2008 spent (1/7/08)5 000€

41 Orsay, 4th July 2008 C. de La Taille - Administration Council 41 Communication  talks in conferences Photo Detector ’07, Kobe June, 29th, 2007 –Invited Talk - Integrated electronics for SiPM, J. Fleury TWEPP ’07, Prague Sept, 5th, 2007 –Talk – Hardroc presentation, N. Seguin Moreau –Talk – MAROC presentation, P. Barrillon –Poster – Digital part of Spiroc, F. Dulucq –Poster – Analogue part of Spiroc, L.Raux –Poster – Skiroc presentation, J. Fleury IEEE – Nuclear Science Symposium, Honolulu Oct, 31st, 2007 –Talk - A front-end chip to read out the imaging Si-W calo for ILC, J. Fleury –Talk - Hardroc, N. Seguin-Moreau –Talk - Spiroc, C. de la Taille –Poster – ROC chip, digital, F. Dulucq –Poster – MAROC chip, P. Barrillon ASPERA R&D astroparticle physics meeting, Lisbon Jan, 8th, 2008 –Talk – Integrated front-end electronics for astroparticle, J. Fleury CALOR ’08, Pisa May, 28th, 2008 –Talk – 2 nd generation ASICs for CALICE/EUDET calorimeters, C. de La Taille NDIP ’08, Aix-les-bains June, 4th, 2008 –Tutorial – Tutorial on readout electronics for photodetectors, C. de La Taille –Talk - SPIROC : Silicon PM readout chip

42 Orsay, 4th July 2008 C. de La Taille - Administration Council 42 Communication  Web site [P. Barrillon] http://omega.in2p3.fr Provide up-to-date datasheets, application notes, firmware, etc.

43 Orsay, 4th July 2008 C. de La Taille - Administration Council 43 Teaching Gisèle Martin Chassard Supelec, analogue microelectronics, labs, 20h Nathalie Seguin-Moreau Master MIP, analogue electronics, lectures and training, ups, 9h Vanessa Tocut ISEP, analogue and mixed electronics, lectures and training, 60h Julien Fleury ENSTA, digital electronics, training, 24h Ludovic Raux ENSTA, digital electronics, training, 24h Sylvie Blin ISEP, mixed electronics, training, 60h Christophe de La Taille Supelec, analogue electronics, lectures, training and labs, 50h Stephane Callier ESIEE, RF&HF measurement, labs, 16h EFREI, mixed microelectronics, lectures and training, 30h

44 Orsay, 4th July 2008 C. de La Taille - Administration Council 44 Summary Positive –An IR2 position in 2008 from IN2P3 –A good international visibility –A good collaboration with CSNSM, IPNO & LLR Negative –No budget (yet) from in2p3 (but there should be one on an identified line for 2009) –Weak coupling with test group –position inside the lab and the electronics dept

45 Orsay, 4th July 2008 C. de La Taille - Administration Council 45 Questions & Comments

46 Orsay, 4th July 2008 C. de La Taille - Administration Council 46 Annexes Cost of ASICS Testboards Collaboration details

47 Orsay, 4th July 2008 C. de La Taille - Administration Council 47 Multi Project Run vs Dedicated Run HARDROC2: will be submitted in june 08 (MPW run) MPW: 1k€/mm 2 => Hardroc= 25 k€ –25 dies delivered in September 08, to be packaged –About 300 dies available (no guaranty): 100 euros/die + packaging –Price : 25 k€ + 100 € * nb_chips Engineering run: –Wafer 8’’ Available area=23 000 mm 2 -1 reticle=20x20 mm 2 =400 mm 2 -=> 65 reticles/wafer -16 chips (25 mm 2 ) / reticle => 1000 Hardroc/wafer -Cost : 150 k€ (masks) + 5k€/wafer - Price : 150 k€ + 5 € * nb_chips -valuable for more than 1250 chips

48 Orsay, 4th July 2008 C. de La Taille - Administration Council 48 TEST BOARD MAROC (COB) 64ch PM socket USB port GPIB port Control Altera

49 Orsay, 4th July 2008 C. de La Taille - Administration Council 49 Collaboration : details (1/3) LSST (2006-2010) Omega is part of the LSST collaboration. It is designing the CCD camera front-end ASIC ‘ASPIC’ in collaboration with LPNHE Paris. ILC Si-W ECAL (2003-2020) The Si-W ECAL prototypes designed within the CALICE/EUDET collaboration is read out with Omega ASICs (‘FLC_PHY3’ and ‘SKIROC’ in collaboration with LPC Clermont).Prototypes funded by EUDET FP6 program. Production of 1000 ASICs in 2009 ILC RPC-Fe DHCAL (2006-) Omega is designing a read-out ASIC for the RPC digital HCAL (‘HARDROC’) within the CALICE collaboration. Production of 5000 chips in 2009. ILC Scintillator (SiPM)-Fe AHCAL (2003-) Omega is designing a read-out ASIC for the Scintillator SiPM Analogue HCAL (‘SPIROC’) within the CALICE/EUDET collaboration. Production of 1000 chips in 2009. ILC Scintillator (SiPM)-W ECAL(2005-) Front-end electronics designed for ILC AHCAL is reused to read-out the Sci-Fe ECAL designed by the KEK group within the CALICE collaboration. Omega is providing technical support on that detector electronics. ATLAS luminometer ALFA (2003-2009) Omega is part of the ALFA luminometer collaboration and has designed the MA-PM read-out ASIC (‘MAROC2’). ATLAS luminometer LUCID (2005-2009) Omega is part of the LUCID luminometer collaboration and has designed the MA-PM read-out ASIC (‘MAROC3’). 1000 ASICs produced in 2008. ATLAS tracker (2007-) Omega is part of the collaboration on 3D electronics R&D for ATLAS tracker.

50 Orsay, 4th July 2008 C. de La Taille - Administration Council 50 Collaboration : details (2/3) Double Chooz (2007-2008) Omega has provided a small production of MAROC2 chips to readout the muon veto tagger. 250 ASICs produced in 2008 PMm² (2007-2010) Omega is part of the generic research program PMm² (funded by ANR) aimed to reduce cost on high area of PM detectors. An ASIC (‘PARISROC’) has been designed for that program SuperNemo Front-end (2008-) A readout ASIC (PARISROC) has been designed to read out the supernemo calorimeter. SuperNemo SNATS (2008-) Omega has designed a time stamper in collaboration with LPC Caen for supernemo calorimeter. SymbolX (2008-) A Maroc test board has been provided by Omega to perform irradiation tests for the spatial experiment. SymbolX by APC lab. North Auger (2004-2007) Omega has designed a set of current-feedback operational amplifiers prototypes to read out PM for the north auger collaboration Medical imaging ISS Roma (2007-) Omega provides chips and test boards to Roma lab for medical imaging applications (PET cameras) Medical imaging INFN Pisa (2007-) Omega provides chips and testboards to INFN Pisa lab for medical imaging applications (PET cameras). Medical imaging IMNC (2007-2009) Omega provides HARDROC chips and support for PCB design of the TRECAM camera to IMNC for medical imaging applications.

51 Orsay, 4th July 2008 C. de La Taille - Administration Council 51 Collaboration : details (3/3) Balloon experiment Aachen (2008-) Omega provides HARDROC chips and testboards to Aachen lab for balloon experiment applications. Generic detector R&D (2007-) Omega provides electronics for SiPM R&D to readout SiPM matrices (LAL Detector group) Space telescope for EECR measurement (2006-) Omega provides MAROC chips to Korean EWHA physics group to read out MAPMT for a space telescope aimed to EECR measurement. FJPPL (2006-) Collaboration with KEK group (M Tanaka) on ASIC R&D for megaton-like experiment linked to PMm². One Maroc test board supplied. FCPPL (2007-) Collaboration with IHEP (Beijing). One Chinese visitor for 6 months (1/2/08  31/7/08) on photomultiplier readout design. Collaboration on Parisroc and Building blocks. One Chinese PhD student (1/9/08  1/9/09).


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