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Digital Logic & Design Dr. Waseem Ikram Lecture No. 26.

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Presentation on theme: "Digital Logic & Design Dr. Waseem Ikram Lecture No. 26."— Presentation transcript:

1 Digital Logic & Design Dr. Waseem Ikram Lecture No. 26

2 J-K flip-flop circuit with potential timing problem

3 Timing diagram of J-K flip-flop circuit with potential timing problem

4 Flip-flop circuit with potential timing problem due to Clock

5 Timing diagram of J-K flip-flop circuit with Clock Skew

6 J-K flip-flop circuit with potential race condition

7 Timing Diagram showing glitches due to race conditions

8 Timing Diagram of negative-edge triggered flip-flop avoiding glitches

9 3-bit Asynchronous Up-Counter

10 Timing Diagram of a 3-bit Asynchronous Up-Counter

11 InputOutput Clock Pulses F2F2 F1F1 F0F0 1000 2001 3010 4011 5100 6101 7110 8111 Output State of a 3-bit Asynchronous Up-Counter

12 Timing Diagram of a 3-bit Asynchronous with propagation

13 Timing Diagram of a 3-bit Asynchronous with high frequency clock

14 InputOutput Clock Pulses F2F2 F1F1 F0F0 1000 2001 3010 4011 5010 6101 7110 Output of a 3-bit Asynchronous Up-Counter with high frequency clock

15 Mod-6 Counter

16 Timing diagram of a Mod-6 Counter

17 Asynchronous Decade Counter

18 Timing diagram of a Decode Counter

19 Internal circuit diagram of the 74LS93A Counter

20 74LS93A connected as MOD-16 Counter

21 74LS93A connected as Decade Counter

22 74LS93A Connected as a frequency divider (divide by 50)

23 3-bit Asynchronous Down- Counter

24 Timing diagram of a 3-bit Asynchronous Down-Counter

25 2-bit Synchronous Counter

26 Timing diagram of a 2-bit Synchronous Counter

27 Internal circuit diagram of the 74LS93A Counter

28 Recap Asynchronous Inputs Master-Slave flip-flop Operating Conditions Multi-vibrators Non-retriggerable Retriggerable

29 Multivibrators 555 Mono-Astable Multi-vibrator

30 Timing Problems in flip-flops Timing Problems (fig 1) Clock Skew (fig 2) Race Conditions (fig 3)

31 Asynchronous Counters Asynchronous Counters (fig 4) Propagation delay (fig 5) Propagation Delay at high frequency (fig 6) Mod-n Counters (fig 7) Decade Counter (fig 8) Integrated Circuit 74LS93A counter (fig 9) MOD-16 and Decade Counters (fig 10) MOD-50 Counter (fig 11) Down Counters (fig 12)

32 Synchronous Counters Synchronous Counter (fig 13) 3-bit counter (fig 14) 4-bit counter (fig 15) Synchronous Decade Counter (fig 16 tab 3)


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