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Chapter 36 Combinational Logic Circuits
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Objectives After completing this chapter, you will be able to: –Describe the functions of encoders, decoders, multiplexers, adders, subtractors, and comparators –Identify the schematic symbols for encoders, decoders, multiplexers, adders, subtractors, and comparators
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Objectives (cont’d.) –Identify applications for combinational logic circuits –Develop truth tables for the different combinational logic circuits
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Encoders Figure 36-1. Decimal-to-binary encoder.
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Figure 36-2. Decimal-to-binary priority encoder.
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Encoders (cont’d.) Figure 36-3. Logic symbol for a decimal-to-binary priority encoder.
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Figure 36-4. Binary-to-decimal decoder. Decoders
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Decoders (cont’d.) Figure 36-5. Logic symbol for a binary-to-decimal decoder.
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Multiplexers Figure 36-12. A single-pole, multiposition switch can be used as a multiplexer.
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Logic circuit for an four-input multiplexer.
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The 4-to-1 multiplexer has 4 input bit, 2 control bits, and 1 output bit. The four input bits are D0,D1,D2 and D3. only one of this is transmitted to the output y. The output depends on the value of AB which is the control input. The control input determines which of the input data bit is transmitted to the output. For instance, as shown in fig. when AB = 00, the upper AND gate is enabled while all other AND gates are disabled. Therefore, data bit D0 is transmitted to the output, giving Y = Do.
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If the control input is changed to AB =11, all gates are disabled except the bottom AND gate. In this case, D3 is transmitted to the output and Y = D3. An example of 4-to-1 multiplexer is IC 74153 in which the output is same as the input. Another example of 4-to-1 multiplexer is 45352 in which the output is the compliment of the input. Example of 16-to-1 line multiplexer is IC74150.
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Multiplexers (cont’d.) Figure 36-14. Logic symbol for an eight-input multiplexer.
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Multiplexer are used in various fields where multiple data need to be transmitted using a single line. Following are some of the applications of multiplexers - Communication system – Communication system is a set of system that enable communication like transmission system, relay and tributary station, and communication network. The efficiency of communication system can be increased considerably using multiplexer. Multiplexer allow the process of transmitting different type of data such as audio, video at the same time using a single transmission line. Telephone network – In telephone network, multiple audio signals are integrated on a single line for transmission with the help of multiplexers. In this way, multiple audio signals can be isolated and eventually, the desire audio signals reach the intended recipients. Computer memory - Multiplexers are used to implement huge amount of memory into the computer, at the same time reduces the number of copper lines required to connect the memory to other parts of the computer circuit. Transmission from the computer system of a satellite – Multiplexer can be used for the transmission of data signals from the computer system of a satellite or spacecraft to the ground system using the GPS (Global Positioning System) satellites.
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Multiplexers (cont’d.) Figure 36-16. Using a multiplexer for parallel-to-serial conversion.
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Arithmetic Circuits Figure 36-17. Truth table constructed using addition rules.
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Arithmetic Circuits (cont’d.) Figure 36-21. Truth table for a full adder.
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Arithmetic Circuits (cont’d.) Figure 36-22. Logic circuit for a full adder using two half adders.
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Arithmetic Circuits (cont’d.) Figure 36-23. Logic symbols for half adder (A) and full adder (B).
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Arithmetic Circuits (cont’d.) Figure 36-25. Truth table constructed using subtraction rules.
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Arithmetic Circuits (cont’d.) Figure 36-27. Logic circuit (A) and truth table (B) for a full subtractor.
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Arithmetic Circuits (cont’d.) Figure 36-28. Logic symbols for half subtractor (A) and full subtractor (B).
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Figure 36-30. Truth table for a comparator. Arithmetic Circuits (cont’d.)
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Figure 36-31. Comparing two 2-bit numbers. Arithmetic Circuits (cont’d.)
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Figure 36-34. Programmable array logic (PAL) architecture. Programmable Logic Devices
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Figure 36-35. Programmable logic array (PLA) architecture.
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Summary An encoder accepts one or more inputs and generates a multibit binary output A decoder processes a complex binary code into a digit or character that is easy to recognize A multiplexer allows digital data from several sources to be routed through a common line for transmission to a common destination
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Summary (cont’d.) The truth table for the adding rules of binary numbers is equivalent to the truth table for an AND gate and an XOR gate A comparator is used to compare the magnitudes of two binary numbers Programmable logic devices (PLDs) are used to implement complex logic functions
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