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Field Effect Transistors

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Presentation on theme: "Field Effect Transistors"— Presentation transcript:

1 Field Effect Transistors

2 Introduction Two main types of FET:
- JFET –Junction field effects transistor MOSFET – Metal oxide semiconductor field effect transistor D-MOSFET ~ Depletion MOSFET E-MOSFET ~ Enhancement MOSFET Similarities: -Amplifiers -Switching devices -Impedance matching circuits Differences: -FET’s are voltage controlled devices whereas BJT’s are current controlled devices. -FET’s also have a higher input impedance, but BJT’s have higher gains. -FET’s are less sensitive to temperature variations and more easily integrated on IC’s. - FET’s are also generally more static sensitive than BJT’s.

3 Introduction types of FET:
JFET –Junction field effects transistor JFET is a unipolar-transistor, which acts as a voltage controlled current device and is a device in which current at two electrodes is controlled by the action of an electric field at a reversed biased p-n junction.

4 Construction and characteristics of JFET
N-channel device will appear as the prominent device with paragraph and section devoted to the impact of using a p-channel. Major part of structure is n-type material. Top of the n-type channel is connected through an ohmic contact to a terminal referred to as the drain (D) The lower end-connected through an ohmic contact to a terminal referred as source (S) P-type materials are connected together and to the gate (G) terminal. JFET has two p-n junctions under no-bias conditions.

5 Construction and characteristics of JFET
N-Channel JFET Circuit Layout

6 JFET Operating Characteristics
There are three basic operating conditions for a JFET: VGS = 0, VDS increasing to some positive value B. VGS < 0, VDS at some positive value C. Voltage-Controlled Resistor

7 Voltage-Controlled Resistor
The region to the left of the pinch-off point is called the ohmic region. The JFET can be used as a variable resistor, where VGS controls the drain-source resistance (rd). As VGS becomes more negative, the resistance (rd) increases.

8 p-Channel JFETS p-Channel JFET acts the same as the n-channel JFET,
except the polarities and currents are reversed.

9 P-Channel JFET Characteristics
As VGS increases more positively: the depletion zone increases ID decreases (ID < IDSS) eventually ID = 0A Also note that at high levels of VDS the JFET reaches a breakdown situation. ID increases uncontrollably if VDS> VDSmax.

10 JFET Symbols

11 MOSFETs MOSFET Field effect transistor is a unipolar transistor, which acts as a voltage-controlled current device and is a device in which current at two electrodes drain and source is controlled by the action of an electric field at another electrode gate having in-between semiconductor and metal very a thin metal oxide layer

12 MOSFETs MOSFETs have characteristics similar to JFETs and additional
characteristics that make then very useful. There are 2 types: Depletion-Type MOSFET Enhancement-Type MOSFET

13 Depletion-Type MOSFET Construction
The Drain (D) and Source (S) connect to the to n-doped regions. These N-doped regions are connected via an n-channel. This n-channel is connected to the Gate (G) via a thin insulating layer of SiO2. The n-doped material lies on a p-doped substrate that may have an additional terminal connection called SS.

14 Depletion-type MOSFET in Depletion Mode
The characteristics are similar to the JFET. When VGS = 0V, ID = IDSS When VGS < 0V, ID < IDSS The formula used to plot the Transfer Curve still applies:

15 Symbols

16 Enhancement-Type MOSFET Construction
The Drain (D) and Source (S) connect to the to n-doped regions. These n-doped regions are connected via an n-channel. The Gate (G) connects to the p-doped substrate via a thin insulating layer of SiO2. There is no channel. The n-doped material lies on a p-doped substrate that may have an additional terminal connection called SS.

17 Enhancement-Type MOSFET Construction
VGS=0, VDS some value, the absence of an n-channel will result in a current of effectively 0A VDS some positive voltage, VGS=0V, and terminal SS is directly connected to the source, there are in fact 2 reversed-biased p-n junction between the n-doped regions and p substrate to oppose any significant flow between drain and source. VDS and VGS have been set at some positive voltage greater than 0V, establishing the D and G at a positive potential with respect to the source The positive potential at the gate will pressure the holes in the p substrate along the edge of the SiO2 layer to leave the area and enter deeper regions of the p-substrate The result is a depletion region near the SiO2 insulating layer void of holes

18 Symbols

19

20 VMOS VMOS – Vertical MOSFET increases the surface area of the device.
Advantage: This allows the device to handle higher currents by providing it more surface area to dissipate the heat. VMOSs also have faster switching times.

21 CMOS CMOS – Complementary MOSFET p-channel and n-channel MOSFET on the same substrate. Advantage: Useful in logic circuit designs Higher input impedance Faster switching speeds Lower operating power levels


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