1. More on Digital Logic Devices and Circuits Trac D. Tran ECE Department The Johns Hopkins University Baltimore, MD 21218

2. Outline  Binary adders  Observations  Half-adder and XOR gate  Full adder  N-bit adder  On binary subtraction, multiplication and division  Sequential logic and memory elements  Reset flip-flop  Toggle flip-flop

3. Binary Addition: Observation Addition BinaryDecimal 0+0=0 0+1=1 1+0=1 1+1=101+1=2  Simple observation

4. Half-Adder InputsOutputs ABSumCarry 0000 0110 1010 1101 Truth Table of Half-Adder XORAND A B Sum Carry  What about n-bit inputs?

5. Principle of Binary Addition  Binary addition  Very similar to decimal addition  Starting from least significant bit (LSB), keep track of partial sum & carry until reaching most significant bit (MSB)  Simpler than decimal addition: only 0 and 1 are involved  Example 1101100 1011101 + carry 1 0 0 0 0 1 1 1 0 1 0 1 1 1 1 LSBMSB Binary Addition 108 93 + carry Decimal Addition 201 11

6. Full Adder  We need to add three bits (A, B, and Carry), not two as in the half-adder  This is called a full adder InputsOutputs ABCiSCo 00000 00110 01010 01101 10010 10101 11001 11111 Carry in Ci Carry out Co AB Sum S 1-bit Full Adder ?

7. N-bit Full Adder Ci A0B0 S0 A1B1 S1 A2B2 S2 A3B3 S3 A4B4 S4 A5B5 S5 A6B6 S6 A7B7 S7 Co S8 first carry in, set to 0 here last carry out, overflow bit 8-bit Full Adder  Circuit that adds two positive 8-bit numbers  Final result can be a 9-bit number  Carry-out of last stage is the MSB of the sum

8. Binary Subtraction  Binary subtraction  Very similar to binary addition  Subtracting = adding the negative of the number  How do we represent negative numbers in binary?  2’s-complement and negative numbers  Complementing (inverting) every bit in the corresponding positive number representation and then add 1  An example with 6-bit numbers Always 0 for positive number in 2’s complement notation Always 1 for negative number in 2’s complement

9. More on 2’s-Complement  2’s-complement of a 2’s-complement  Range of N-bit 2’s-complement numbers  Example of subtraction via addition 000011 111011 + 111110 00011 carry negative 2 in 2’s-complement

10. Binary Multiplication  Binary multiplication can be implemented with binary adders and binary shifts  What about division?  Easy when divided by powers of two 3 5 X 15 Decimal 0011 0101 X 0011 0000 0011 0000 + 0001111

11. Sequential Logic  Combinatorial logic circuits: current input values determine the output value  Sequential logic circuits: output value also depends on past input values. Sequential logic circuits have memory  Common memory elements  Set-Reset Flip-Flop (SR-FF, RS Latch): basic computer memory cell  Toggle Flip-Flop (T-FF): basic computer counting cell

12. Set-Reset Flip-Flop Q S R SRQQ 00QQ 0101 1010 1111 Comment hold reset set strange state Timing Diagram S R Q Q

13. SR-FF Analysis Q S R S R Q Q SQQ 001 010 100 110 QRQ 001 010 100 110 initial state set transition reset transition  Q remembers which input, S or R, was 1 last  If S then Q=1  If R then Q=0

14. Example: Car Alarm S R Q alarm onalarm off Q S R SR-FF ALARM +5V alarm off +5V Accelerometer alarm ignited