Presentation is loading. Please wait.

Presentation is loading. Please wait.

Instruction Set Architecture Stephen Murphy. What is ISA? Aspects of the computer visible to the programmer: Data Types Registers Instructions Addressing.

Similar presentations


Presentation on theme: "Instruction Set Architecture Stephen Murphy. What is ISA? Aspects of the computer visible to the programmer: Data Types Registers Instructions Addressing."— Presentation transcript:

1 Instruction Set Architecture Stephen Murphy

2 What is ISA? Aspects of the computer visible to the programmer: Data Types Registers Instructions Addressing

3 Data Types Unsigned Integers Signed Integers Characters Floating-point Numbers

4 Unsigned Integers Stores the integer in standard binary format 00101011 = 1 + 2 + 8 + 32 = 43

5 Signed Integers Stores the integer in two’s complement format to denote sign Steps to convert signed integer to base 10: Store leading bit, 1 = negative, 0 = positive Invert all bits Add 1

6 Characters Represented by integer values Many different character encodings exist: ASCII UNICODE UTF-8 UTF-16

7 Floating-point Numbers Four components in a floating-point number: Sign Mantissa Radix Exponent

8 Registers Registers provide a variety of services: Instruction Counter Register-to-Register Operations Memory-to-Register Operations Memory-to-Memory Operations Processor Status

9 Instruction Counter Register All von Neumann machines have an instruction counter which is a register

10 Register-to-Register Registers Operate on one register using another register (ADD) Supported by all ISA’s

11 Memory-to-Register Registers Operate on memory using a register (LOAD, STORE) Not supported by all ISA’s

12 Memory-to-Memory Registers Operate on one memory location using another memory location (STRCMP) Not supported by all ISA’s

13 Processor Status Registers A collection of registers that indicate the current state of the processor (Carry, Interrupt, Zero) Different ISA’s use different status registers

14 Instructions Categories of instructions: Operate Memory Access Control Miscellaneous

15 Operate Instructions Typical operations include: Arithmetic (ADD, SUB, MUL, DIV) Logical (AND, OR, NOT, XOR) Shift (ROL, ROR) Character (STRCMP) Stack (PUSH, POP)

16 Memory Access Instructions Typical operations include: Load (LODSB) Store (STOSB)

17 Control Instructions Conditional Branch (JZ, JC, JO, JS) Unconditional Branch (JMP)

18 Miscellaneous Instructions Input/Output (IN, OUT) Interrupts (CLI, INT, IRET) Halt Privileged

19 Addressing Register Addressing Memory Addressing

20 Register Addressing When an operand is taken from a register it is called register addressing

21 Memory Addressing Logical Address Space (sequential memory locations) Physical Address Space (many types exists: absolute addressing, indirect addressing, etc.)

22 ISA Examples MIPS Motorola 6800 ARM SPARC PowerPC x86 IA-64

23 ISA Humor BOB – Branch On Bug ADN – Add Nauseam BPDI – Be Polite, Don’t Interrupt BPE – Bypass Program Error DMNS – Do what I Mean, Not what I Say DC – Divide and Conquer CDHI – Crash Disk Head Immediately

24 References http://webster.cs.ucr.edu/AoA/Windows/H TML/ISA.html http://webster.cs.ucr.edu/AoA/Windows/H TML/ISA.html http://www.wordiq.com/definition/Instructio n_set http://www.wordiq.com/definition/Instructio n_set http://www.cs.panam.edu/~meng/Course/ CS4335/Notes/master/node22.html http://www.cs.panam.edu/~meng/Course/ CS4335/Notes/master/node22.html


Download ppt "Instruction Set Architecture Stephen Murphy. What is ISA? Aspects of the computer visible to the programmer: Data Types Registers Instructions Addressing."

Similar presentations


Ads by Google