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The Slow Control System of the HADES RPC Wall Alejandro Gil on behalf of the HADES RPC group IFIC (Centro Mixto UV-CSIC) Valencia, 46071, Spain IEEE-RT2009.

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Presentation on theme: "The Slow Control System of the HADES RPC Wall Alejandro Gil on behalf of the HADES RPC group IFIC (Centro Mixto UV-CSIC) Valencia, 46071, Spain IEEE-RT2009."— Presentation transcript:

1 The Slow Control System of the HADES RPC Wall Alejandro Gil on behalf of the HADES RPC group IFIC (Centro Mixto UV-CSIC) Valencia, 46071, Spain IEEE-RT2009 MAY 2009 Beijing

2 OUTLINE INTRODUCTION to the HADES EXPERIMENT INTRODUCTION to the HADES EXPERIMENT EPICS EPICS SLOW CONTROL HARDWARE SLOW CONTROL HARDWARE COMMERCIAL HARDWARE COMMERCIAL HARDWARE CUSTOM MADE HARDWARE CUSTOM MADE HARDWARE FEE: FEE: TDC-READOUT BOARD TDC-READOUT BOARD SPI THRESHOLD SETTING SPI THRESHOLD SETTING 1-WIRE 1-WIRE LV AND DETECTOR LV AND DETECTOR 1-WIRE 1-WIRE HADCON BOARD HADCON BOARD SUMMARY SUMMARY

3 HADES EXPERIMENT Detection of electron- positron pairs produced in relativistic hadron- nucleus and nucleus- nucleus collisions with the goal of studying vector meson properties in nuclear matter, both normal and hot and compressed. Detection of electron- positron pairs produced in relativistic hadron- nucleus and nucleus- nucleus collisions with the goal of studying vector meson properties in nuclear matter, both normal and hot and compressed. Consists of several subdetectors for: Consists of several subdetectors for: Triggering Triggering Tracking Tracking Momentum reconstruction Momentum reconstruction Particle identification Particle identification High Acceptance DiElectron Spectrometer Located at GSI Helmholtzzentrum für Schwerionenforschung GmbHfacility, Darmstadt (Germany) Goal of the Hades RPC project: upgrade the low angle Time of Flight (TOF) detector Time resol < 100ps Magnet InnerMCDs OutterMCDs Rich TOF(scintillator) Shower

4

5 8 m 2 6 sectors

6 EPICS Is a widely used scalable control system. Is a widely used scalable control system. Allows to build huge distributed control systems Allows to build huge distributed control systems Open source Open source EPICS (Experimental Physics and Industrial Control) is used in HADES since its startup. EPICS (Experimental Physics and Industrial Control) is used in HADES since its startup. TWO READOUT CHANNELS PER CELL 374 ch/sector x 6 sectors  TOTAL: 2244 electronic channels

7 SCS VARIABLES Flow Gases Flow Gases High Voltage High Voltage Low Voltage Low Voltage COMMERCIAL HW COMMON GUI From different and hetereogeneous systems: From different and hetereogeneous systems: EPICS Thresholds setting Thresholds setting Temperatures Temperatures Switches Switches Analog V-I Analog V-I CUSTOM BUILT HW Front End LV Det

8 From different and hetereogeneous systems: From different and hetereogeneous systems: SCS VARIABLES Flow Gases Flow Gases High Voltage High Voltage Low Voltage Low Voltage COMMERCIAL HW COMMON GUI EPICS Thresholds setting Thresholds setting Temperatures Temperatures Switches Switches Analog V-I Analog V-I CUSTOM BUILT HW Front End LV Det

9 COMMERCIAL HW High Voltage ~5kV CAEN A1526 - 6ch (SY1527 crate) Standard Control Protocol Interface EPICS Genesys Power Supplies (48V DC ) Freon (85%) SF6 (15%) Isobutane (5%) Ethernet (TCP/IP) Gas flows Bronkhorst Standard PC

10 SCS VARIABLES Flow Gases Flow Gases High Voltage High Voltage Low Voltage Low Voltage COMMERCIAL HW COMMON GUI From different and hetereogeneous systems: From different and hetereogeneous systems: EPICS Thresholds setting Thresholds setting Temperatures Temperatures Switches Switches Analog V-I Analog V-I CUSTOM BUILT HW Front End LV Det

11 The SC system for the custom hardware uses a system-on-chip processors as a platform for the Slow Control System The SC system for the custom hardware uses a system-on-chip processors as a platform for the Slow Control System CUSTOM HW EPICS input output controllers run in AXIS ETRAX100LX chip processors EPICS input output controllers run in AXIS ETRAX100LX chip processors Embedded LINUX-Cris kernel Embedded LINUX-Cris kernel Possibility of designing distributed architectures with custom hardware Possibility of designing distributed architectures with custom hardware Specific devices/chips on custom made boards (DACs, Tª sensors…) ClientMEDM Channel access EPICS IOC

12 Low voltage system TRB MBDB To ethernet Front End Data acquisition system CUSTOM ELECTRONICS DC-DC converter 48V 5V,-5V,3.3V 5 3.3 -5 Commercial power supply RPC cells Detector

13 Low voltage system TRB MBDB To ethernet Front End Data acquisition system CUSTOM ELECTRONICS DC-DC converter 48V 5V,-5V,3.3V 5 3.3 -5 Commercial power supply Thresholds setting Thresholds setting Temperatures Temperatures Switches Switches Analog V-I Analog V-I DACs (Serial Peripheral Interface) 1-WIRE RPC cells Detector

14 TRB MBDB To ethernet Front End Temperature sensors DACS (8 chips x 8 channels) SC Variables adquired directly by the DAQ System (TRB) LTC2620(SPI) DS18B20(1-WIRE) Data acquisition system CUSTOM ELECTRONICS 5V,-5V,3.3V

15 32input LVDS lines General purpose TDC Readout Board: Main board of the DAQ Main board of the DAQ (128 TDC ch. timing 100ps ) ETRAX processor: ETRAX processor: Embedded LINUX-Cris Embedded LINUX-Cris 100Mbps Ethernet 100Mbps Ethernet Additional resources: FPGA (VIRTEX4) -now bypassed- FPGA (VIRTEX4) -now bypassed- TigerSharc DSP TigerSharc DSP Board Controller FPGA LVL2 queue LVL1 queue ETRAX Optical link (2Gbit/s) trigger HPTDC Optional DSP processing Ethernet HPTDC Front End DAQ Board (TRB)

16 TRB MBDB To ethernet Front End DACS (8 chips x 8 channels) SC Variables adquired directly by the DAQ System (TRB) LTC2620(SPI) Data acquisition system CUSTOM ELECTRONICS 5V,-5V,3.3V

17 Thresholds set before physics run Thresholds set before physics run SPI Thresholds setting Each 8 DACs (64 ch) connected in daisy chain (SPI) Each 8 DACs (64 ch) connected in daisy chain (SPI) ETRAX(IOCserver) All thresholds are set at the same time All thresholds are set at the same time “Preset table” and “Read table” “Preset table” and “Read table” Readback for correct programming verification Readback for correct programming verification

18 OUTLINE HAD:RPC:S3:M0:C0:spToFL HAD:RPC:S3:M0:C0:readToFL HAD:RPC:S3:M0:C0:DRWToFL HAD:RPC:S3:M0:C0:spToFL.DISA HAD:RPC:S3:DEFToF HAD:RPC:S3:M3:C2:ToFL HAD:RPC:3:wT BASED on MEDM BURT (Backup Restore Tool)

19 TRB MBDB To ethernet Front End Temperature sensors SC Variables adquired directly by the DAQ System (TRB) DS18B20(1-WIRE) Data acquisition system CUSTOM ELECTRONICS 5V,-5V,3.3V

20 1-Wire Temp. sensing Bus from MAXIM Bus from MAXIM Fully digital Fully digital Unique ID per device Unique ID per device (64 bit) (64 bit) 0-60ºC (+-0.5ºC) Look for specific ID Command: Read Temp. Assign received value to the corresponding EPICS record

21 FULL Front End DAC chain DAC chain Temp Sensors Temp Sensors DAC chain DAC chain Temp Sensors Temp Sensors DAC chain DAC chain Temp Sensors Temp Sensors DAC chain DAC chain Temp Sensors Temp Sensors DAC chain DAC chain Temp Sensors Temp Sensors DAC chain DAC chain Temp Sensors Temp Sensors DAC chain DAC chain Temp Sensors Temp Sensors DAC chain DAC chain Temp Sensors Temp Sensors ETRAX (IOC server) EPICS ETRAX Client A Client F 1 24 Distributed architecture: Distributed architecture: 96 Temp Sensors 96 Temp Sensors 768 DAC chips 768 DAC chips 6144ch 6144ch 1-WIREINTERFACES:SPIETHERNET DAQDAQ

22 LV 48VDC TRBs MBOs MBs DBs miniMBOs

23 Low voltage system TRB MBDB To ethernet Front End Data acquisition system CUSTOM ELECTRONICS DC-DC converter 48V 5V,-5V,3.3V 5 3.3 -5 Commercial power supply RPC cells Detector

24 Low voltage system CUSTOM ELECTRONICS DC-DC converter 48V 5V,-5V,3.3V 5 3.3 -5 Commercial power supply RPC cells Detector Tª Sens: Tª Sens:1xDS18B20 ADC(4ch): ADC(4ch):8xDS2450 Dual switch: Dual switch:1xDS2413 Tª Sens: Tª Sens:12xDS18B20 Dual switch: Dual switch:2xDS2413 1-Wire bus: Reduces cabling complexity Reduces cabling complexity Allows networks of even hundreds of m. Allows networks of even hundreds of m.

25 Location of the LV and detectors ~6m

26 LV: 384 ADC ch.384 ADC ch. 12 temp sensors12 temp sensors 6 switches6 switchesDetector: 72 temp sensors 72 temp sensors 12 switches 12 switches All the 1-wire devices will be controlled by only 1 control board

27 Custom board Custom board General purpose General purpose (designed at GSI) (designed at GSI) Processor Processor Ethernet Ethernet Linux Linux Microcontroller Microcontroller USART USART ADC ADC Digital I/O Digital I/O HADCON (Also CAN comm)

28 SUMMARY EPICS allows integration of many channels with a distributed architecture from many different systems: commercial and custom made DAQ readout platform used for part of the slow control (FEE) 1-wire network will be used for LV and Detector control/monitoring with a custom Hadcon board Installation is ongoing with fully operation of the detector is expected at the end of the year

29 Thanks for your attention


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