1. FSP progress update & camera concept Contents: Mechanical structure System components CCD sensor and circuit examples Hybrid concept IIC concept and tasks Feedthrough and connector interface Johannes Treis MPI Halbleiterlabor Munich, 22.7.2014

2. Mechanical structure Johannes Treis / Halbleiterlabor der MPG Status: Revised design has been evaluated at MPS Design has been verified in the essential parts Feasibility has been shown Open issues to be discussed: Application of spring load Heat pipe vs. heat exchangers Next steps: Finalisation of “proto-design” for building of thermal mockup Manufacturing of components Experimental verification of design in vacuum chamber

3. Mechanical structure Johannes Treis / Halbleiterlabor der MPG Application of spring load on therad plates Integrate heat exchanger in mechanical support Avoid temperature limitation of heatpipes

4. System components Johannes Treis / Halbleiterlabor der MPG SequencerADC / DAQ Outboard Interface Inboard Interface Hybrid Power Sensor Backend Instrument Interface circuitry (IIC) Cooling

5. CCD sensor Johannes Treis / Halbleiterlabor der MPG CCD sensor: Concept: Backside illumi- nated, frame store, split frame, column-parallel readout pnCCD Format: 1k x 1k storage, 2 x 1 k x 0.5 k framestore Pixel size: 36 x 36  m 2 Total sensitive area: 36.8 x 73.3 mm 2 Total chip size: 4.2 x 8.1 mm 2 Operating temperature: -35°C (target) 16 “blinded” common mode correction channels for each hemisphere (re- wired on pitchadapter) Target operating framerate: 400 Hz (~4  s / row) Data rate: 840 Mbyte / s (16 bit) Backside optimized for optical wavelength using ARC

6. Hybrids Johannes Treis / Halbleiterlabor der MPG In addition: RFET circuitry on each hybrid

7. Focal plane assembly Johannes Treis / Halbleiterlabor der MPG

8. CCD channel schematic Johannes Treis / Halbleiterlabor der MPG

9. RESET FET control Johannes Treis / Halbleiterlabor der MPG 1 channel per hybrid required Galvanical decoupling, as digital part of MAX 4420 not „floating“ Bootstrapped RFET_Gate_hi power supply ~ 10 V switching amplitude ~ - 18 V Lo level

10.  -Driver schematics Johannes Treis / Halbleiterlabor der MPG 6 channels per hemisphere required (NW, SW hybrids) Galvanical decoupling, as digital part of EL7457 not „floating“ Bootstrapped Phi_hi, Amp_hi Power supplies ~ 10 V switching amplitude (Amp_hi - Amp_lo) ~ - 18 V Phi_Lo level Identical circuitry for FS and ST 4th „dummy“ channel for monitoring purposes?

11. Calibration Switch Johannes Treis / Halbleiterlabor der MPG 1 channel per hybrid or 1 channel per system? Optional „source spy“ could make absolute source node potential observable Useful for debugging and parameter adjustment Analog output Multiplexer with zero pass-through resistance, „bidirectional“ Digitization of source potential?

12. FET source regulation Johannes Treis / Halbleiterlabor der MPG Veritas FE current regulation: Input stage current for CCD FET Need to regulate VSSS current core-individually Monitoring of current is mandatory

13. Thermal management Johannes Treis / Halbleiterlabor der MPG CoolingTemperature control

14. Circuit temperature Housekeeping: Environmental sensors Johannes Treis / Halbleiterlabor der MPG DAQ central housekeeping slow control interface IIC inboard compartment IIC outboard compartment Casing temperature Circuit(s) temperature Heatsink temperature Backbone temperature Pressure sensor Humidity sensor (?) Hybrid temperature Sensor temperature PHI temperature Hybrid temperature Sensor temperature PHI temperature Hybrid temperature Sensor temperature PHI temperature Hybrid temperature Sensor temperature PHI temperature Hybrids Housekeeping circuitryrequires „IRQish“ functionality to e.g. Trigger transition to safe mode In case of critical errors

15. ASIC supply currents Detector supply currents PHI driver supplies? ASIC supply currents Detector supply currents PHI driver supplies? ASIC supply currents Detector supply currents PHI driver supplies? ASIC supply currents Detector supply currents PHI driver supplies? Housekeeping: Monitoring of supplies DAQ central housekeeping slow control interface IIC inboard compartment IIC outboard compartment Common supplies Current draw Locally generated secondary voltages Current draw Locally generated secondary voltages Hybrids Johannes Treis / Halbleiterlabor der MPG

16. Housekeeping: Watchdog Johannes Treis / Halbleiterlabor der MPG DAQ central housekeeping slow control interface IIC inboard compartment IIC outboard compartment Hybrids Digital HB of all VERITAS Implement PHI HB? Digital HB of all VERITAS Implement PHI HB? Digital HB of all VERITAS Implement PHI HB? Digital HB of all VERITAS Implement PHI HB? FPGA HB ? Watchdog signal requires „IRQish“ functionality to e.g. Trigger transition to safe mode In case of critical errors

17. Sequence distribution Johannes Treis / Halbleiterlabor der MPG DAQ central housekeeping slow control interface IIC inboard compartment SW Hybrid NW Hybrid NE Hybrid SE Hybrid IIC outboard compartment Phi, RFET, SCK, MCK RFET, SCK, MCK

18. Power Johannes Treis / Halbleiterlabor der MPG Simple Main power supply: Few voltages, few feedthroughs Veritas supply w/ sense lines to inboard IIC (depending on trace resistance also other high current supplies Local power generation on inboard IIC for low power, low current supplies Inboard compartment contains distribution / decoupling, measurement and power up circuitry

19. Example vacuum feedthrough Johannes Treis / Halbleiterlabor der MPG Power feedthrough: ~20 power pins + ~10 sense lines Different current loads require different pin sizing / multiplicies Digital signal feedthrough: 36 sequencer pins (18 control signals from sequencer) 16 configuration and monitoring interface pins (2 independent 4-wire-interfaces) 16 monitoring pins (8 selectable heartbeat signal outputs Analog signal feedthrough: 64 analog signal pins (4 x 8 differential analog output signals) 8 analog monitoring pins (4 x 2 single ended selectable analog signal outputs) Min. Number of pinsComments Power feedthrough30 x x GNDsDedicated cross sections / optimized resistance Digital feedthrough68Input and output Analog feedthrough72Differential and single ended

20. Example hybrid pinout Johannes Treis / Halbleiterlabor der MPG Summary: If common connector: 200-250 pins for one single connector (sufficient grounding pins?) “Pin Multiplicity” for ground and supply lines ( as function ofr current draw) needs to be determined If separate connectors: 100 + x pins for supply & bias connector, 100 + x pins for signal connector Dedicated connectors reduce the need for “high pin multiplicity”, as choice of proper connector design e.g. for power can provide suitable connector impedance. As small and compact design as possible (size constraints!) Vacuum compatible