1. Vladimir Gromov, NIKHEF, Amsterdam. GOSSIPO-3 Working Group February 03, 2009. Local Oscillator in the GOSSIPO-3 readout chip.

2. Local Oscillator GOSSIPO-3 Working Group 03/02/2009 V. Gromov 2 NAND EN OUT 12 inverters: Total Delay = 0.85ns EN T fast (1.72 ns) OUT 0ns…T slow (25 ns) 0…15 (4-bit TDC) 1 2 ….. 12 Regular PFET: W= 1.3u L= 0.3u Regular NFET: W= 0.48u L= 0.3u Standard NAND gate Regular PFET’s: W= 1.3u L= 0.3u Regular NFET’s: W= 0.48u L= 0.3u Vdd=1.2V

3. Channel-to-channel mismatch GOSSIPO-3 Working Group 03/02/2009 V. Gromov 3 Monte Carlo simulations: 100 runs ( mismatch only) ∆t max = 430ps (accumulated) ∆t, ps Number of counts 25ns T= 1.8ns

4. Simulations in corners Nominal corner (TT) Slow corner (SSF) mismatch !!! Frequency in various corners ± 25% Accumulated error 330ps (T=1.2ns) mismatch Accumulated error 450ps (T=2ns) GOSSIPO-3 Working Group 03/02/2009 V. Gromov 4

5. GOSSIPO-3 Working Group 03/02/2009 V. Gromov 5 Temperature effect Temp = 10°C Temp = 25°C Temp = 40°C ∆t max = - 800ps (accumulated) ∆t max = + 800ps (accumulated) !!! ∆ Temp < 30°C → ∆t max < 1.6ns (1 bit TDC)

6. Power supply voltage effect GOSSIPO-3 Working Group 03/02/2009 V. Gromov 6 VDD= 1.165V VDD=1.2V VDD=1.235V ∆t max = +800ps (accumulated) ∆t max = - 800ps (accumulated) !!! ∆ VDD < 60mV → ∆t max < 1.6ns (1 bit TDC)

7. On-wire voltage drop effect Pixel_1 Pixel_2 Pixel_128 Pixel_255 Pixel_256 1.2cm 168Ω Bus (Vdd_osc) 5μm width M1 I VDD =200μA R = 0.07Ω●1.2cm/5μm = 168 Ω ∆U = 0.5 ● 168 Ω ● 200μA = 16mV ∆U 3 active pixels = 48mV (tolerable) P 2 pixels are active = 256 ● 25ns ● 27.2kHz = 17% P 3 pixels are active << P 2 pixels are active 1.2cm 168Ω GOSSIPO-3 Working Group 03/02/2009 V. Gromov 7 number of pixels active time period occupancy per pixel