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ECE 206 - Fall 2000 - G. Byrd1 Register A register stores a multi-bit value. We use a collection of D-latches, all controlled by a common WE. When WE=1, n-bit value D is written to register.
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ECE 206 - Fall 2000 - G. Byrd2 Memory Now that we know how to store bits, we can build a memory – a logical k × m array of stored bits. k = 2 n locations m bits Address Space: number of locations (usually a power of 2) Addressability: number of bits per location (e.g., byte-addressable)
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ECE 206 - Fall 2000 - G. Byrd3 2 2 x 3 Memory address decoder word select word WE address write enable input bits output bits Address 11--> Address 10--> Address 01--> Address 00 | | v
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ECE 206 - Fall 2000 - G. Byrd4 Clock Simply oscillates between high and low signal. You need a clock for your D-flip flop. http://www.ee.nthu.edu.tw/jcliao/Logic98/chap06/P212.JPG
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ECE 206 - Fall 2000 - G. Byrd5 Remember the Combined Requirements (3 pts) Reset signal works as intended (3 pts) Design is organized on multiple pages (9 pts) Ability to store ALU result into memory
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ECE 206 - Fall 2000 - G. Byrd6 Clues - Use the pictures in the book P.70/P.69 - What is required for you to be Able to write to a register? 1. Which Address 2. Write Enable ON 3. Write Switch ON 4. Clock pressed - You will need muxes in order to read from memory and be able to display out, this part is tricky.
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ECE 206 - Fall 2000 - G. Byrd7 LC-3 Data Path Combinational Logic State Machine Storage
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