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Do you have a square waveform generator, but not a real pulse generator for testing the integrator? Here is a simple (crude) way to get the pulse you need.

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Presentation on theme: "Do you have a square waveform generator, but not a real pulse generator for testing the integrator? Here is a simple (crude) way to get the pulse you need."— Presentation transcript:

1 Do you have a square waveform generator, but not a real pulse generator for testing the integrator? Here is a simple (crude) way to get the pulse you need -- about 1 millisecond long, 1-5 volts high, 50 pulses each second. It generates a more-or-less square pulse on every rising edge of the input square wave. Adjust... --the repetition rate by the waveform generator's frequency (50 Hz) --the width of the output pulse by the waveform generator's amplitude (low) --the amplitude of the output pulse using the 10K pot 10K  0.1  F 1N914 10K  pot 10K  input impedance + - INTEGRATOR SQUARE WAVE IN Believe me when I tell you that this turkey will not be found in any book of standard circuits; it's a "make do with what you've got" sort of kludge. A TTL one-shot (e.g. 74123) is a better way to go if you've got one. A waveform generator chip is even better. The first capacitor and resistor differentiate the square wave, producing short up-going and down-going pulses. The first diode removes the down-going pulses. The op-amp, highly saturated, is usually at -15 V but rushes to +15 V when the incoming pulse shows up. The 10K pot voltage divides the output to get a reasonable (and adjustable) pulse height. The final diode keeps only the positive portion of the output pulse. 741 op-amp 1

2 Here is a better pulse generator based on the 74LS123 dual one-shot (only one one-shot is used). The input is a square wave, about 3 volts peak-to-peak, at the desired pulse repetition rate (e.g. 10-40 Hz). The outgoing pulse width is variable between about 0.1 ms and 3.5 ms, and the outgoing pulse height is variable from 0 volts to about 3 volts -- plenty of variation to give the voltage integrator a good workout. 1N914 10K  2 Integrator amplitude adjustment GND B IN 1 8 +5V A IN 10K  V CC 16 74LS123 14 15 100K  0.1  F C EXT RC EXT pulse width adjustment Q OUT 13 ~3 V peak-to-peak ~40 Hz The 74LS123 is powered by +5 volts (pin 16) and ground (pin 8). Do not connect +15 V or -15 V to this chip! Set the two pots to about midrange and the input waveform generator to low amplitude. Power up. Increase the waveform generator's amplitude until you see output pulses, but don't go beyond about 4 volts peak-to-peak on the input. Adjust the two pots to get the output pulse width and amplitude that you need to exercise the voltage integrator. not connected connected 2

3 The Leaky Voltage Integrator The upper trace is the incoming pulse to be integrated. Its amplitude is very small. The lower trace is the output of the integrator. You can see it growing (downward) during the input pulse, and discharging (leaking) during the long wait until the next input pulse. Two questions: 1. Is the leak so large that it has a significant impact on the accuracy of the integration? Remember that the leaking doesn't stop during the input pulse. 2. Is the integrator's capacitor adequately discharged before the next pulse arrives? V OUT 3

4 Since no current flows in or out of the op-amp input terminals, the current I through R 1 must be the same as the current through R 2. I = V/R for both resistors. Hence [1] (V OUT - V IN- ) / R 2 = (V IN- - V SRC ) / R 1 Multiplying by R 1 R 2... [2] R 1 (V OUT - V IN- ) = R 2 (V IN- - V SRC ) Expanding... [3] R 1 V OUT - R 1 V IN- = R 2 V IN- - R 2 V SRC [4] By definition, the open-loop gain of the op-amp is G OL = -V OUT / V IN- (with V IN+ at ground) so V IN- = -V OUT / G OL. Substituting for V IN- in [3]... [5] R 1 V OUT + R 1 V OUT / G OL = -R 2 V OUT / G OL - R 2 V SRC Multiplying by G OL and collecting terms with V OUT... [6] R 1 G OL V OUT + R 1 V OUT + R 2 V OUT = -R 2 V SRC G OL [7] V OUT = -V SRC R 2 G OL / (R 1 G OL + R 1 + R 2 ) which for very large G OL becomes just V OUT = -V SRC (R 2 / R 1 ). In the general case, the two equations in red, [7] then [4], will yield V OUT and V IN- given V SRC, G OL, R 1 and R 2. [8] It is useful to define the actual gain of the entire circuit G CIRC = -V OUT / V SRC = R 2 G OL / (R 1 G OL + R 1 + R 2 ) (from [7]) Inverting... [9] 1 / G CIRC = (R 1 G OL + R 1 + R 2 ) / R 2 G OL = R 1 / R 2 + R 1 / R 2 G OL + 1 / G OL [10] We can define the ideal (very large G OL ) gain of the amplifier as G IDEAL = R 2 /R 1. Multiplying [9] by G IDEAL... [11] G IDEAL / G CIRC = 1 + 1 / G OL + G IDEAL / G OL = (G OL + G IDEAL + 1) / G OL. [12] G CIRC = G IDEAL  G OL / (G OL + G IDEAL + 1) In words, the actual gain of the amplifier is the ideal gain R 2 /R 1 multiplied by a correction factor that is nearly 1 for op-amps with very large open- loop gains but becomes significantly less than 1 as the op-amp gain becomes comparable to the ideal gain. Clearly you can reach the troublesome region where the correction factor is significantly less than 1 by (1) operating the op-amp in a frequency regime where its open-loop gain is low, or (2) demanding that the gain of your amplifier be very high, or (3) even worse, both. Calculating the Basic Properties of the Inverting Amplifier 4

5 What is the effect on a feedback-controlled inverting amplifier if the op-amp does not have a very high open-loop gain? Let's consider the inverting amplifier (circuit #1). R1 -- the input resistor (e.g. 10 K) R2 -- the feedback resistor (e.g. 100 K) V SRC -- the voltage at the input to the circuit (referenced to ground) V IN- -- the voltage at the inverting input of the op-amp (referenced to ground since V IN+ is at ground) V OUT -- the voltage at the op-amp (hence circuit) output (referenced to ground) G OL -- the open-loop gain of the op-amp  -V OUT / V IN- for V IN+ at ground G CIRC -- actual circuit gain  -V OUT / V SRC for V SRC and V OUT referenced to ground If we define the ideal gain of the amplifier to be G IDEAL = R2 / R1 and substitute this into eqn. 1, then G CIRC = G IDEAL x G OL / ( G OL + G IDEAL + 1) For high G OL, the correction factor relating the actual and ideal circuit gains is nearly one. As G OL gets lower, approaching G IDEAL, the correction factor starts falling significantly below 1, so the real circuit gain becomes less than the feedback-defined ideal gain. Noting that no current flows in or out of the V IN- terminal, we can compute the current through R1 and R2: I = (V OUT - V SRC ) / (R1 + R2) and the voltage drop across R2: (V OUT - V IN- ) = I  R2. As defined above, V OUT = -G OL V IN- ; V IN- = -V OUT / G OL After a few lines of algebra : G CIRC  -V OUT / V SRC = R2 / [ R1 + (R1 + R2) / G OL ] eqn. 1 For G OL very large, (R1 + R2) / G OL is very small compared to R1, so G CIRC  R2 / R1 As G OL becomes smaller, the full formula must be used; the denominator increases so |G CIRC | becomes smaller. 5

6 Minimum Circuit for Sine and Triangle Waves -- EXAR XR-2206 Waveform Generator +15 V 4 12 3 5 6 GND Vcc 7 15 16 13 14 2 9 8 STO AMSI 1 MO TC1 TC2 TR1 TR2 FSKI SYNCO WAVEA1 WAVEA2 SYMA1 SYMA2 11 x 10K 0.1uF SINE or TRIANGLE WAVE OUT 200 x x x BIAS 10 1uF SQUARE WAVE OUT Timing capacitor C T 0.001 uF to 100 uF 5.1K 1.0uF +15 V 10K Timing resistor R T 1K  to 2M  Remove resistor for triangle wave output RTRT CTCT Frequency 1 / R T C T Here F = 1 / (10 4  10 -7 ) = 1KHz +15 V 1uF Smooth internal bias voltage Smooth Vcc Sine wave is centered at about this voltage, here ~7.5 volts Determines amplitude of sine wave, here ~1.6 volts peak-to-peak 0 to 50K  Pullup resistor for open collector square-wave output Frequency determined by R T and C T Offset and amplitude determined by pin-3 circuitry Frequency determined by R T and C T Varies between ~ground and ~pullup voltage 6

7 Embellished Circuit for Sine and Triangle Waves -- EXAR XR-2206 Waveform Generator +15 V 4 12 3 5 6 GND Vcc 7 15 16 13 14 2 9 8 STO AMSI 1 MO TC1 TC2 TR1 TR2 FSKI SYNCO WAVEA1 WAVEA2 SYMA1 SYMA2 11 x 50K SINE or TRIANGLE WAVE OUT 500 x BIAS 10 1uF SQUARE WAVE OUT Switch in various capacitors between 0.001 uF to 100 uF 5.1K +15 V 10K 1K  Make R T continuously variable between 1K  and 2M . You must not let R T fall below 1K  ! ! Sine waveform adjustment. Open switch for triangle waves. RTRT CTCT Frequency 1 / R T C T +15 V 1uF Smooth internal bias voltage Smooth Vcc Provide some adjustment for the sine wave's offset voltage. Remember that moving this away from the midpoint voltage (7.5 volts) reduces the maximum sine wave amplitude. 1.0uF Make this a 0-50K  variable resistor for amplitude control Pullup resistor for open collector square-wave output Frequency determined by R T and C T Offset and amplitude determined by pin-3 circuitry Frequency determined by R T and C T Varies between ~ground and ~pullup voltage  2M  1K Waveform symmetry adjustment. 25K 7


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