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ATLAS Upgrade Report to the LHCC ATLAS Upgrade Report to the LHCC Phil Allport 25/09/12 Schedule Assumptions Phase-0 –IBL –Consolidation of Many Systems.

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Presentation on theme: "ATLAS Upgrade Report to the LHCC ATLAS Upgrade Report to the LHCC Phil Allport 25/09/12 Schedule Assumptions Phase-0 –IBL –Consolidation of Many Systems."— Presentation transcript:

1 ATLAS Upgrade Report to the LHCC ATLAS Upgrade Report to the LHCC Phil Allport 25/09/12 Schedule Assumptions Phase-0 –IBL –Consolidation of Many Systems Phase-I –New Small Muon Wheel (see talk of Tatsuo Kawamoto) –Calorimeter L1 Granularity, Trigger/DAQ, FTK, AFP Phase-II –Inner Tracker Replacement –Calorimeter and Muon Readout, Trigger/DAQ, Computing Conclusions

2 ?, IR 4x, bunch spacing 25 ns ~20-25 fb -1 ~75-100 fb -1 ~350 fb -1, bunch spacing 25 ns, bunch spacing 50 ns Go to design energy, nominal luminosity Injector and LHC Phase-I upgrade to full design luminosity HL-LHC Phase-II upgrade, IR, crab cavities √ s=14 TeV, L=5x10 34 cm -2 s -1, luminosity levelling √ s=14 TeV, L~2x10 34 cm -2 s -1, bunch spacing 25 ns √ s=13~14 TeV, L~1x10 34 cm -2 s -1, bunch spacing 25 ns √ s=7~8 TeV, L=6x10 33 cm -2 s -1, bunch spacing 50 ns  LHC startup, √ s = 900 GeV LHC Schedule Assumptions (See for example “HiLumi LHC” Submission to ESPG) https://indico.cern.ch/abstractDisplay.py/getAttachedFile?abstractId=153&resId=0&confId=175067 (Phase-0) 2

3 Phase-0

4 IBL Overview IBL Modules and staves –Sensors & Chips done, Bump-bonding: processing of sensor and electronic wafers completed - first batch of bare modules received, under assembly and qualification –Focus on systematic understanding of FEI4B modules in electrical tests –Several improvements implemented to module assembly and in stave assembly –Stave flex had production hick-up resulting in re-production of more Cu parts –First IBL stave assembled and systematically tested for 2 months now - stave works, some items remain to be understood Integration –Stave production testing ready and gear up now to prepare final test setups for full IBL –Integration tooling being finalized and SR1 area prepared for IBL integration Installation –Service design finalized and working on orders now –Installation tooling is tested in Bat 180, Beam pipe well on the way, IST assembly started –Prepare now detailed installation plan for LS1 Off-detector –Final prototypes for ROD, BOC, opto available, first major FW released and under test now –Integrate now off-detector elements to system test with staves in SR1

5 Stave Electrical Tests Stave works in calibration scans and source scans –More optimization ongoing (minimal threshold, configuration, powering…) Use first stave for several system-related tests: –Tuning at different thresholds, gains, supply voltages,… –Test of all modules IV –Test of module noise –LVDS Signal transmission and power- up studies –Special test on power line noise and ripple during/after scans –Source test of modules –Cross-talk –Test for merged and disconnected bumps IV curves Signal out Eye diagrams Source scan Noise 140-160 e- typically Double-chip Module Single- chip Module

6 Integration in SR1: IBL Around Beam Pipe Currently prepare all tools and SR1 clean room for the final assembly of beam pipe with IBL staves and final test of IBL on surface –Space sharing and room preparation include preparation for Pixel on surface for exchange of service quarter panels Expect to start with stave integration around beam pipe in March 2013 Prepare test system for full IBL Will operate full IBL on surface as final function check before installation in Pixel detector Expect to be ready for final tests in summer 2013 New ATLAS VI beam pipe –Assembly completed end June ahead of schedule –Leak tested after bake-out – found leak –Decided to cut faulty weld and re-weld –Expect delivery as planned in Dec. –Working now on optimizing final layout of beam pipe wrapping (for X 0 and envelop considerations in centre)

7 Phase-I

8 LVL1 Calorimeter and Trigger Key target (see also New Small Wheel Presentation) is to maintain high efficeincy for Level-1 triggering on low PT leptons and photons In the calorimeter this implies changes to the front-end electronics to allow greater granularity to be exploited at Level-1. Trigger upgrades include topological trigger, cluster and jet energy processor, feature extractors, muon sector logic and CTP =46, L=2 x 10 34 From LoI electron rate vs threshold Distribution of the R η parameter for electrons and jets, defined as the ratio of the energy in the 3x2 over the energy in the 7x2 clusters of the 2nd layer of the EM calorimeter.

9 FTK and AFP Fast TracK (FTK): Global hardware based tracking by start of L2 –Descendent of the CDF Silicon Trigger (SVT) –Inputs from Pixel and SCT. –Data in parallel to normal read-out. –Provides inputs to L2 in ~ 25 μs with track parameters at ~offline precision for b tagging, tau ID and lepton isolation –Two phases: Pattern recognition (10 9 ) Track fitting ATLAS Forward Physics (AFP) –Tag and measure scattered protons at ± 210m –Radiation-hard edgeless 3D silicon developed in IBL context –10ps timing detector for association with high p T primary vertex –Probe hard diffractive physics and central exclusive production of heavy particles → New High Speed Optical link (HOLA) cards installed with dual outputs to allow testing of FTK functionality with real data → < 20 ps timing achievable and minimum gain loss up to ~3C/cm 2

10 Phase-II

11 Phase-II (installation 2022-23) Integrated radiation levels and particle densities per beam crossing well beyond the design specifications of the experiment. Requirements include: ­New Inner Detector (strips and pixels) − very substantial progress in many R&D areas ­ New LAr front-end and back-end electronics ­ New Tiles front-end and back-end electronics ­ TDAQ upgrade ­ TAS and shielding upgrade ­ Various infrastructure upgrades ­ Common activities (installation, safety, …) ­ New FCAL (if conditions require it)? ­ LAr HEC cold electronics consolidation (radiation hardness)? ­ L1 track trigger (latency budget and physics case)? ­ Muon Barrel and Large Wheel system electronics upgrade? ­ Forward detectors upgrade? 11 FCal Cold cover

12 ATLAS: Draft Target Specifications Plan for occupancy numbers based on this (see µ values below) Plan integrated dose figures based on this µ values going with the peak luminosity figure if achieved with 25ns beam crossing When we calculate the dose figures which are used to specify the radiation hardness of components which can be reliably tested for post-irradiation performance (eg ASICs, silicon sensors, diamond,...) apply this safety factor to the dose calculations in setting the radiation survival specification 12 * https://indico.cern.ch/abstractDisplay.py/getAttachedFile?abstractId=153&resId=0&confId=175067https://indico.cern.ch/abstractDisplay.py/getAttachedFile?abstractId=153&resId=0&confId=175067 * *

13 New All-silicon Inner Tracker Baseline layout of the new ATLAS inner tracker for HL-LHC Aim to have at least 14 silicon hits everywhere (robust tracking) Forward pixel Long Barrel Strips Short Barrel Strips Forward Strips Barrel pixel Microstrip Module Prototypes Pixel Quad Module Prototype

14 14 Possible Trigger Scheme with L1 Track

15 Full Calorimeter Granularity Level-1 Trigger

16 ATLAS Phase-II Draft LoI Timeline

17 Conclusions IBL progressing well for installation in LS1 (Phase-0) Phase-I LoI upgrade projects progressing towards TDRs New Small Wheel upgrade plans being presented for CB approval (see next presentation) LoI for Phase-II well advanced R&D behind these proposals is in a mature state Preliminary exploration of Phase-II physics case undertaken for ESPP ATLAS looks forward to a programme which fully exploits the physics potential of the LHC and its upgrades

18 Back-up

19 IBL Modules Sensors - FE chip FEI4B – bump-bonding status –Planar and 3D sensor batches delivered and tested ok with good yield - Done Planar Double Chip Sensor (DCS, 168 installed) : 544 good of 600 delivered = 90.1% yield 3D sensors Single Chip Sensor (SCS, 112 installed) : 306 good SCS on selected 62 wafers (120 wafers total in runs) –FEI4B Chip received in sufficient quantity – have tested ~40 wafers (e.g. ~1600 good chips – IBL installed is 448 –Bump-bonding is well on the way at IZM, which will reach production throughput (~30 modules/week) soon Have flip chipped 136 modules to date for the installed 112 3D modules +168 planar modules –Module flex V3 Finalized design (V3) after module review in June and submitted for production at Pheonix and Mipot 151 SC and 150 DC flexes delivered for first production, then loaded 125 DC and 120 SC at Mipot for first production modules – expect SMD loaded flexes Sept 20 for tests Key topic now: Module assembly –Several changes from FEI4A modules and new FEI4B chip resulted in an ~3 months “learning curve” since review and an overall delay of ~ 6-8 weeks in module production Understanding powering and chip performance through tests New flex and changes to glue (radiation hardness checked) Choice of glue and assembly procedure adapted Several improvements on bonding quality and procedure

20 Module Tests: Noise, Source Tests, IV, Powering

21 IBL Stave Assembly Carbon Fibre – 1 st production batch received –1 st batch: 8 staves received (2 rejects) 2 nd batch of staves (~12) for delivery end September –Sufficient bare staves in hand to start final IBL stave loading Stave flex production –First 3 sets received for tests –Delay on production due to accidental over-etching during Copper-layer manufacturing Assembled first stave in June/July – “Stave-0” in Geneva –Thermal cycling of stave+flex –Loaded stave with FEI4A modules –Test and thermal cycling of finished stave –Metrology of stave Several important lessons learned –Bonding on module and stave -> feed-back to module assembly: –Adhesion of flex on stave to improve through abrasion and secure with clamp –Metrology setup improvements to measure module positions Stave design and manufacture fully reviewed in July Next stave with first FEI4B modules to demonstrate final IBL stave for production loading

22 Off-detector Elements ROD and BOC –5 boards of each produced –Readout first FEI4s with ROD & BOC –Main target now is firmware for first operation –Goal is full system test of IBL stave with ROD/BOC –Plan review later this year to release production of boards Opto & PP2 –First IBL opto board ready for tests. Tests together with nSQP optoboard (same design, different channel count) –20 Finisar VCSELs are in an accelerated lifetime study for at least 1000 hours. –PP2LV design completed & prototyped, 4 boards under test, controller boards done, HV on-going Services –Finalized cable length calculation and routing for cables and fibres –Prepared orders for type 2 cable –Receiving quotes for other cables and fibres –Goal is ready for installation when Atlas opens ROD BOC

23 IBL Overview Schedule ActivitiesStartingEnding FEI4-BSept 11: SubmissionDec 11 received first chips, Aug 12 received all remaining wafers, testing ongoing Bump bondingAug 11: pre-productionNov 12: Completion (incl. Spares) Module assemblyEnd May 12: 1 st modules ready for loading Feb 13 (spare and contingency incl) Module loadingAug 12:  4 staves to be ready by Oct 12 May 13: Completion (spare and contingency incl) Stave loadingMar 13: starting with the 1 st large batch of available staves June 13: Completion Final tests and commissioning July 13Sept 13: IBL Installation (Nov 13 with contingency) Sensors done, FEI4B available and working, Modules and Staves reviewed Numerous improvements on module assembly, more detailed module tests on FEI4B caused about 2 months delay Stave loading with modules similarly delayed by ~2 months: First FEI4B stave in October, aim to go to stave production loading in November to complete first 4 production staves by end of this year

24 DBM Modules and Integration Sensors – 12 sensors at bump-bonding assembly, more in production Finalize module assembly now for DBM –Assembled 4 prototype modules with DBM layout, components and module carrier (using planar sensors+ FEI4A for assembly tests) Module assembly worked well, all 4 of 4 test modules fully functional Mechanics –Have build 2 sets of first telescopes as integration test assemblies (verify assembly sequence and check mounting/space on nSQP setup and cruciform Finished PP0 power & readout board design and produced board Finished 1 st set of signal and power bundle (2 needed) HITBUS chip on PP0: –This chip makes the L1 trigger from DBM for Lumi measurement based on Pixel Hitbus signal (Pixel-OR) –Chip received back in May and tested ok –Now first chip included on PP0 and will test DBM telescope self-triggering in October testbeam


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