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Published byColeen Fox Modified over 8 years ago
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EE140 Final Project Members: Jason Su Roberto Bandeira Wenpeng Wang
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Project Specs Supply Range: 1.6V to 3.2V Temperature Range: -40C to 85C LSB = 4mV 100ksamples/s on ADC Components to design: o Analog MUX (4 inputs) o Programmable Gain Amplifier (integers gain from 1 to 8) o Voltage Regulators for Analog and Digital components o Analog to Digital Converter (10 ksamples/s) o Bandgap Voltage and temperature sensor
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Modularization Strategy: Modularize! Modules: Bandgap and Temperature Sensor Analog and Digital Regulators Analog MUX Programmable Gain Amplifier Analog to Digital Converter
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Bandgap and Temperature Sensor
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Biggest variation of bandgap voltage over temperature range of -40C to 80C is 2.6mV Slope of temperature sensor = 2mV/K so that each LSB corresponds to 2K as project specs
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Analog and Digital Regulators
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LDO is ideal for analog regulator, to deal well with small battery values Vdda follows the value of Vbg (with an offset caused by buffer) Vddd is able to sustain its value in a 10% error from nominal value even with the MicroProcessor connected MicroProcessor Model: 1nF capacitance in parallel with ideal current source (1mA DC + 4mA @10MHz square wave)
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Analog MUX
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Uses digital logic instead of MUX in series for better performance Logic gates use minimal size transistors for better cost and speed Switches can not be very small so that inputs that are not selected do not interfere with the output Input Range: 0V to 1V for optimal performance Fulfils the 50kHz sample spec Error on the output depends on inputs, but is typically smaller than 100µV for room temperature
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Analog MUX Error for worst case scenario: 50kHz sine wave -> peak of 150µV on 80C
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Programmable Gain Amplifier
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Has a 1LSB error when temperature goes above 70C in gain = 8 due to leakage on switches Big trade-off between Ron and Roff of the switches Error is smaller than 1LSB for Vbat =1.6V->3.2V when temperature is below 50C
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Programmable Gain Amplifier Error at temperature of 80C and PGA_gain = 8
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Analog to Digital Converter Not finished yet -> used ideal
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The complete Circuit
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When using the real battery model (resistor in series with source), the MicroProcessor introduces noise to the all the supply That results in noise in Vbg and consequently all circuits. To account for that, capacitors are used as filters. It’s interesting to notice that the blocks still work even with that noise
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Results for ideal ADC -40C27C85C 1.6 V001 2.4 V001 3.2 V001 -40C27C85C 1.6 V002 2.4 V002 3.2 V002 PGA_Gain = 1PGA_Gain = 8
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Extra Credit: Clock
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On initial configuration, PGA did not work with it (clocks overlapped) Only works at room temperature PGA worked just as nice as with an ideal clock Minimum sized inverters Strategy for controlling frequency: adding capacitances on the gates
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Extra Credit: Clock
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