1. Programmable Logic Devices
Read Only Memory (ROM)
mask programmable
PROM, EPROM, EEPROM
Programmable Logic Array (PLA)
Programmable Array Logic (PAL)
Field Programmable Gate Array (FPGA)
Mux based
LUT based

2. ROMs Input: k Address lines (A) Output: d Data lines (D) Function:
Each possible value of A [0..(2^k)-1] has a unique set of d bits that are output on D when the corresponding “address” is provided on A

3. ROMs
Decoder A0 A1 A2
Ak-1 D0 D1
Dd-1
fuses 1 2
(2^k)-1

4. Implementing Logic in ROMs
A B F1 F2 F3 1 A B
Decoder
fuses F1 F2 F3

5. ROM Types Mask programmable ROM Programmable ROM (PROM)
fuses programmed during manufacture
Programmable ROM (PROM)
0’s programmed by blowing fuses or “burning”
Erasable PROM (EPROM)
programming erased by UV light
Electrically erasable PROM (EEPROM)
programming erased via control signals

6. Programmable Logic Array (PLA)
k product
terms
(AND gates)
m sum
(OR gates)
k X m
fuses
n X k m n
inputs
outputs

7. Programmable Logic Array (PLA)

8. Programmable Array Logic (PAL)D D D