1. 27/06/2016 19:59:33 CSC Alliance — 1 Kimera Richard E-mail: rkimera@must.ac.ugrkimera@must.ac.ug Phone: 0701 437989 INSTITUTE OF COMPUTER SCIENCE DEPARTMENT OF INFORMATION TECHNOLOGY Kimera Richard E-mail: rkimera@must.ac.ugrkimera@must.ac.ug Phone: 0701 437989 INSTITUTE OF COMPUTER SCIENCE DEPARTMENT OF INFORMATION TECHNOLOGY Introduction to operating systems: BIT 2104 Chapter 2: Computer System structures Thursday 12 th September 2013 http://kimrichies.blogspot.com

2. MUST- ICS rkimera@must.ac.ug 2 Chapter 2: Computer-System Structures  We need to have a general knowledge of the structure of a computer system before we can explore the details of system operation.  In this chapter, we look at several disparate parts of this structure to round out our background knowledge.  This chapter is mostly concerned with computer-system architecture, so you can skim or skip it if you already understand the concepts.  The first topics covered here include system startup, I/O, and storage.

3. MUST- ICS rkimera@must.ac.ug 3  The OS must also ensure the correct operation of the computer system. To ensure that user programs will not interfere with the proper operation of the system, the hardware must provide appropriate mechanisms to ensure correct behavior.  Later in this chapter, we describe the basic computer architecture that makes it possible to write a functional OS. We conclude with a network architecture overview. Chapter 2: Computer-System Structures

4. MUST- ICS rkimera@must.ac.ug 4  2.1 Computer-System Operation  2.2 I/O Structure  2.3 Storage Structure  2.4 Storage Hierarchy  2.5 Hardware Protection  2.6 Network Structure  2.7 Summary Chapter 2: Computer-System Structures

5. MUST- ICS rkimera@must.ac.ug 5 2.1 Computer-System operation: Architecture  A modern, general-purpose computer system consists of a CPU and a number of device controllers that are connected through a common bus that provides access to shared memory (Figure 2.1).  Each device controller is in charge of a specific type of device (for example, disk drives, audio devices, and video displays).  The CPU and the device controllers can execute concurrently, competing for memory cycles. To ensure orderly access to the shared memory, a memory controller is provided whose function is to synchronize access to the memory.

6. MUST- ICS rkimera@must.ac.ug 6 Figure 2.1 A modern computer system.

7. MUST- ICS rkimera@must.ac.ug 7 2.1 Computer-System Architecture  For a computer to start running—for instance, when it is powered up or rebooted—it needs to have an initial program to run.  This initial program, or bootstrap program, tends to be simple. Typically, it is stored in read-only memory (ROM) such as firmware or EEPROM within the computer hardware.  It initializes all aspects of the system, from CPU registers to device controllers to memory contents.  The bootstrap program must know how to load the OS and to start executing that system.  To accomplish this goal, the bootstrap program must locate and load into memory the OS kernel. The OS then starts executing the first process, such as “init” and waits for some event to occur.

8. MUST- ICS rkimera@must.ac.ug 8 2.1 Computer-System Architecture  The occurrence of an event is usually signaled by an interrupt from either the hardware or the software.  Hardware may trigger an interrupt at any time by sending a signal to the CPU, usually by way of the system bus.  Software may trigger an interrupt by executing a special operation called a system call (also called a monitor call).  Modern OSs are interrupt driven. If there are no processes to execute, no I/O devices to service, and no users to whom to respond, an OS will sit quietly, waiting for something to happen.

9. MUST- ICS rkimera@must.ac.ug 9 2.1 Computer-System Architecture  Events are almost always signaled by the occurrence of an interrupt or a trap.  A trap (or an exception) is a software-generated interrupt caused either by an error (for example, division by zero or invalid memory access) or by a specific request from a user program that an OS service be performed.  The interrupt-driven nature of an OS defines that system’s general structure. For each type of interrupt, separate segments of code in the OS determine what action should be taken.  An interrupt service routine is provided that is responsible for dealing with the interrupt.

10. MUST- ICS rkimera@must.ac.ug 10 2.1 Computer-System Architecture  When the CPU is interrupted, it stops what it is doing and immediately transfers execution to a fixed location.  The fixed location usually contains the starting address where the service routine for the interrupt is located.  The interrupt service routine executes; on completion, the CPU resumes the interrupted computation. A time line of this operation is shown in Figure 2.2.

11. MUST- ICS rkimera@must.ac.ug 11 Figure 2.2 Interrupt time line for a single process doing output.

12. MUST- ICS rkimera@must.ac.ug 12 2.1 Computer-System Architecture  Interrupts are an important part of a computer architecture. Each computer design has its own interrupt mechanism, but several functions are common.  The interrupt must transfer control to the appropriate interrupt service routine. The straightforward method for handling this transfer would be to invoke a generic routine to examine the interrupt information; the routine, in turn, would call the interrupt-specific handler.

13. MUST- ICS rkimera@must.ac.ug 2.1 Computer-System Architecture  However, interrupts must be handled quickly, and, given that only a predefined number of interrupts is possible, a table of pointers to interrupt routines can be used instead.  The interrupt routine is then called indirectly through the table, with no intermediate routine needed.  Generally, the table of pointers is stored in low memory (the first 100 or so locations).  These locations hold the addresses of the interrupt service routines for the various devices. This array, or interrupt vector, of addresses is then indexed by a unique device number, given with the interrupt request, to provide the address of the interrupt service routine for the interrupting device. OSs as different as MS-DOS and UNIX dispatch interrupts in this manner. 13

14. MUST- ICS rkimera@must.ac.ug 14 2.1 Computer-System Architecture  The interrupt architecture must also save the address of the interrupted instruction.  Many old designs simply stored the interrupt address in a fixed location or in a location indexed by the device number.  More recent architectures store the return address on the system stack.  If the interrupt routine needs to modify the processor state—for instance, by modifying register values—it must explicitly save the current state and then restore that state before returning. After the interrupt is serviced, the saved return address is loaded into the program counter, and the interrupted computation resumes as though the interrupt had not occurred.

15. MUST- ICS rkimera@must.ac.ug 15 2.1 Computer-System Architecture  A system call is invoked in a variety of ways, depending on the functionality provided by the underlying processor. In all forms, it is the method used by a process (software) to request action by the OS.  A system call usually takes the form of a trap to a specific location in the interrupt vector. This trap can be executed by a generic trap instruction, although some systems (such as the MIPS R2000 family) have a specific syscall instruction.

16. MUST- ICS rkimera@must.ac.ug 2.2 I/O Structure  After I/O starts, control returns to user program only upon I/O completion.- Synchronous  Wait instruction idles the CPU until the next interrupt  Wait loop (contention for memory access).  At most one I/O request is outstanding at a time, no simultaneous I/O processing.  After I/O starts, control returns to user program without waiting for I/O completion. - Asynchronous  System call – request to the operating system to allow user to wait for I/O completion.  Device-status table contains entry for each I/O device indicating its type, address, and state.  Operating system indexes into I/O device table to determine device status and to modify table entry to include interrupt. 16

17. MUST- ICS rkimera@must.ac.ug 17 Two I/O Methods Synchronous Asynchronous

18. MUST- ICS rkimera@must.ac.ug 18 Device-Status Table

19. MUST- ICS rkimera@must.ac.ug 19 Direct Memory Access Structure  Used for high-speed I/O devices able to transmit information at close to memory speeds.  Device controller transfers blocks of data from buffer storage directly to main memory without CPU intervention.  Only one interrupt is generated per block, rather than the one interrupt per byte. It is usually looked at in terms of operation not storage

20. MUST- ICS rkimera@must.ac.ug 20 2.3 Storage Structure  Computer programs must be in main memory (also called random-access memory or RAM) to be executed.  Main memory is the only large storage area (millions to billions of bytes) that the processor can access directly.  It is implemented in a semiconductor technology called dynamic random-access memory (DRAM), which forms an array of memory words. Each word has its own address.  Interaction is achieved through a sequence of load or store instructions to specific memory addresses.  The load instruction moves a word from main memory to an internal register within the CPU, whereas the store instruction moves the content of a register to main memory.  Aside from explicit loads and stores, the CPU automatically loads instructions from main memory for execution.

21. MUST- ICS rkimera@must.ac.ug 21 2.3 Storage Structure  A typical instruction-execution cycle, as executed on a system with a von Neumann architecture, will first fetch an instruction from memory and will store that instruction in the instruction register.  The instruction is then decoded and may cause operands to be fetched from memory and stored in some internal register.  After the instruction on the operands has been executed, the result may be stored back in memory.

22. MUST- ICS rkimera@must.ac.ug 22 2.3 Storage Structure  Notice that the memory unit sees only a stream of memory addresses; it does not know how they are generated (by the instruction counter, indexing, indirection, literal addresses, and so on) or what they are for (instructions or data).  Accordingly, we can ignore how a memory address is generated by a program.  We are interested only in the sequence of memory addresses generated by the running program.

23. MUST- ICS rkimera@must.ac.ug 23 2.3 Storage Structure  Ideally, we want the programs and data to reside in main memory permanently. This arrangement is not possible for the following two reasons:  Main memory is usually too small to store all needed programs and data permanently.  Main memory is a volatile storage device that loses its contents when power is turned off or otherwise lost. (UPS)

24. MUST- ICS rkimera@must.ac.ug 24 2.3 Storage Structure  Thus, most computer systems provide secondary storage as an extension of main memory. The main requirement for secondary storage is that it should be able to hold large quantities of data permanently.  The most common secondary-storage device is a magnetic disk, which provides storage of both programs and data.  Most programs (web browsers, compilers, word processors, spreadsheets, and so on) are stored on a disk until they are loaded into memory. Many programs then use the disk as both a source and a destination of the information for their processing. Hence, the proper management of disk storage is of central importance to a computer system, as we discuss in other chapters.

25. MUST- ICS rkimera@must.ac.ug 25 2.3 Storage Structure  In a larger sense, however, the storage structure that we have described—consisting of registers, main memory, and magnetic disks—is only one of many possible storage systems.  There are also cache memory, CD-ROM, magnetic tapes, and so on.  Each storage system provides the basic functions of storing a datum, and of holding that datum until it is retrieved at a later time.  The main differences among the various storage systems lie in speed, cost, size, and volatility.

26. MUST- ICS rkimera@must.ac.ug 26 2.3 Storage Structure  Main memory – only large storage media that the CPU can access directly.  Secondary storage – extension of main memory that provides large nonvolatile storage capacity.  Magnetic disks – rigid metal or glass platters covered with magnetic recording material  Disk surface is logically divided into tracks, which are subdivided into sectors.  The disk controller determines the logical interaction between the device and the computer.

27. MUST- ICS rkimera@must.ac.ug 27 Moving-Head Disk Mechanism diskette volume calculating

28. MUST- ICS rkimera@must.ac.ug 28 Storage Hierarchy  Storage systems organized in hierarchy.  Speed  Cost  Volatility  Caching – copying information into faster storage system; main memory can be viewed as a last cache for secondary storage.

29. MUST- ICS rkimera@must.ac.ug 29 Storage-Device Hierarchy  Byte  Kilo: thousand  Mega: million  Giga: billion  Tera: trillion  Peta: quadrillion  Exa: quintillion  Bronto: sextillion

30. MUST- ICS rkimera@must.ac.ug 30 Caching  Use of high-speed memory to hold recently-accessed data.  Requires a cache management policy.  Caching introduces another level in storage hierarchy. This requires data that is simultaneously stored in more than one level to be consistent.

31. MUST- ICS rkimera@must.ac.ug 31 Migration of A From Disk to Register

32. MUST- ICS rkimera@must.ac.ug 32 Hardware Protection  Dual-Mode Operation  I/O Protection  Memory Protection  CPU Protection

33. MUST- ICS rkimera@must.ac.ug 33 Dual-Mode Operation  Sharing system resources requires OS to ensure that an incorrect program cannot cause other programs to execute incorrectly.  Provide hardware support to differentiate between at least two modes of operations. 1.User mode – execution done on behalf of a user. 2.Monitor mode (also kernel mode or system mode) – execution done on behalf of operating system.

34. MUST- ICS rkimera@must.ac.ug 34 Dual-Mode Operation (Cont.)  Mode bit added to computer hardware to indicate the current mode: monitor (0) or user (1).  When an interrupt or fault occurs hardware switches to monitor mode. Privileged instructions can be issued only in monitor mode. monitoruser Interrupt/fault set user mode

35. MUST- ICS rkimera@must.ac.ug 35 I/O Protection  All I/O instructions are privileged instructions.  Must ensure that a user program could never gain control of the computer in monitor mode (I.e., a user program that, as part of its execution, stores a new address in the interrupt vector).

36. MUST- ICS rkimera@must.ac.ug 36 Use of A System Call to Perform I/O

37. MUST- ICS rkimera@must.ac.ug 37 Memory Protection  Must provide memory protection at least for the interrupt vector and the interrupt service routines.  In order to have memory protection, add two registers that determine the range of legal addresses a program may access:  Base register – holds the smallest legal physical memory address.  Limit register – contains the size of the range  Memory outside the defined range is protected.

38. MUST- ICS rkimera@must.ac.ug 38 Use of A Base and Limit Register

39. MUST- ICS rkimera@must.ac.ug 39 Hardware Address Protection

40. MUST- ICS rkimera@must.ac.ug 40 Hardware Protection  When executing in monitor mode, the OS has unrestricted access to both monitor and user’s memory.  The load instructions for the base and limit registers are privileged instructions.

41. MUST- ICS rkimera@must.ac.ug 41 CPU Protection  Timer – interrupts the computer after a specified period to ensure OS maintains control.  Timer is decremented every clock tick.  When timer reaches the value 0, an interrupt occurs.  Timer commonly used to implement time sharing.  Timer also used to compute the current time.  Load-timer is a privileged instruction.

42. MUST- ICS rkimera@must.ac.ug 42 Network Structure  Local Area Networks (LAN, lab network)  Wide Area Networks (WAN, internet) LAN Architecture

43. MUST- ICS rkimera@must.ac.ug 43 Local Area Network Structure

44. MUST- ICS rkimera@must.ac.ug 44 Wide Area Network Structure

45. MUST- ICS rkimera@must.ac.ug 45 Summary  Multiprogramming and time-sharing systems improve performance by overlapping CPU and I/O operations on a single machine.  For a computer to do its job of executing programs, the programs must be in main memory. Main memory is the only large storage area that the processor can access directly. (1GB, volatile, save, UPS)  Most computer systems provide secondary storage as an extension of main memory. (80GB)  Magnetic disk: nonvolatile, random access  Magnetic tape: backup, transferring information  Storage hierarchy: speed, cost  Hardware modes: user mode, monitor mode

46. MUST- ICS rkimera@must.ac.ug 46 Homework 1.How does the distinction between monitor mode and user mode function as a rudimentary form of protection (security) system? By establishing a set of privileged instructions that can be executed only when in the monitor mode, the operating system is assured of controlling the entire system at all times. 2.What are the differences between a trap and an interrupt? What is the use of each function? 3.For what types of operations is DMA useful? Explain your answer. 4.Writing an operating system that can operate without interference from malicious or undebugged user programs requires some hardware assistance. Name three hardware aids for writing an operating system, and describe how they could be used together to protect the operating system. 5.Give two reasons why caches are useful. What problems do they solve? What problems do they cause? If a cache can be made as large as the device for which it is caching ( for instance, a cache as large as a disk), why not make it that large and eliminate the device?

47. MUST- ICS rkimera@must.ac.ug Homework 1.What is an interrupt vector? 2.In what ways do systems treat slow and fast devices differently? 3.What resources must be protected by the operating system? 4.Describe the magnetic properties of disks. 5.How does the operating system determine what mode it is in? 6.How can we prevent users from accessing other users’ programs and data? 7.List some categories of privileged instructions.  I/O  Modifying base and limit registers  Modifying timer  Halt  Turning interrupt enable off  Changing monitor/user-mode bit