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Beam Abort in BEAST2 phase 1 L.Vitale on behalf of INFN and Univ. Trieste L.Vitale - 8th VXD Workshop1 Trieste, 11-09-2015
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Introduction: What’s BEAST2? Beam Exorcism for A STable BELLE Experiment Phase 1: Jan 2016 – Vacuum scrubbing of beam pipe – No collisions, crossing? – Belle will not roll-in – Variety of subsystems on fiberglass support structure (64 pin diodes) – No Belle DAQ, only BEAST DAQ Phase 2: May? 2017 – Belle rolled in – VXD BEAST Assembly – BEAST detectors in dock space and around QCS – BEAST DAQ & Belle DAQ Trieste, 11-09-2015L.Vitale - 8th VXD Workshop2
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Phase 1: BEAST Detectors sensor contact person numberLocationDAQMeasures PIN DiodesD. Cinabro64decidedBEAST X-ray & total ionizing dose Beam abort: diamonds, final prototype L. Vitale4decided*Standalone**Total ionizing dose Micro-TPCsS. Vahsen2-4 decided BEAST Fast neutron rate and recoil spectrum (=directional info.) He-3 tubesS. De Jong4decidedBEASTThermal neutron rate BGOJ. “Terry” Liau8decidedBEASTEM particles / dose CsI Crystals (pure and Tl doped), LySO crystals A.Beaulieu, R. de Sangro 6 pure, 6 doped decidedBEASTEM particles New development, to be discussed today : include “CLAWS” fast scintillator/SiPM detectors already in phase 1? Trieste, 11-09-2015L.Vitale - 8th VXD Workshop3
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Phase 1 Design PIN Diodes 64 channels: 8 z-positions X 4 phi positions X 2 diodes (shielded+unshielded) CsI TPC BGO He3 Trieste, 11-09-2015L.Vitale - 8th VXD Workshop4
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IP1 chamber for Phase 1. Installation Plan, Phase 1 1. 3. 4. Install IP bridge: Completed Install BEAST Phase 1 at IP: Sep & Oct 2015: ongoing Add IP shield wall w/ crane Oct-Nov 2015 [tbd] 2. Repair & Install IP chamber: ~April & May 2015 Trieste, 11-09-2015L.Vitale - 8th VXD Workshop5
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BEAST phase 1 installation status LV + Pietro Cristaudo (INFN tech.) Aug. 26 th - Sept. 3 rd As planned we installed: – 8 SMA-BNC connectors – 8 thin cables (3.5 m) with SMA – 4 diamonds with very short cables SMA And we measured electronic noise with: – AH501 pico-ammeter – CAEN PS – Portable PC (all in Rack #4) We also measured a signal with two 90 Sr sources (thanks to Hiro’s help) Later in November we’ll came back with our colleagues from Elettra Synchrotron to test the new readout Trieste, 11-09-2015L.Vitale - 8th VXD Workshop6
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Installed hardware at the IP Trieste, 11-09-2015L.Vitale - 8th VXD Workshop7
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Installed hardware at the IP top view Trieste, 11-09-2015L.Vitale - 8th VXD Workshop8 Location: horizontal plane (behind the bar) z=-95mm z=+132mm same as phase 2
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Readout system installed Trieste, 11-09-2015L.Vitale - 8th VXD Workshop9 It was on the fourth rack, now dismounted
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Noise measurements We measured electronic noise with this setup: 6.4 uA range (mid range of AH501) 24 bit: – With the metallic shield of the package in contact with the Al pipe the RMS noise 3-2 nA in our – With the package insulated with kapton tape 80 pA (as expected); typical signal will be 1-10 nA – One sensor had larger noise 130 pA (due to cables, now ok, swapped channel using spare cables) On the 2.5 nA range (both 16 and 24 bit): – Typical RMS noise is 12 pA – In both ranges the FFT shows that noise is dominated by 50 Hz multiples (=> it can be filtered by averaging) – averaging we can achieve 1 pA noise or better Trieste, 11-09-2015L.Vitale - 8th VXD Workshop10
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Signal measurements We also measured a signal with two 90 Sr sources (thanks to Hiro help): – Originally (1986) 370 kBq (10 uCi), now half – Originally (1986) 3.33 MBq (~90 uCi), now half On the 2.5 nA range (where we can achieve 1 pA noise) the weaker source in contact with DC3@-100 V produces a ~-8 pA signal The stronger source in contact with DC3 yields ~-42 pA signal (ok, alignment not optimal) Trieste, 11-09-2015L.Vitale - 8th VXD Workshop11
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Signal measurements The stronger source was also used on the other diamonds on the beampipe (without un-taping them); – DM4 & DM5@-100 V show a clear signal ~-10 pA – DM7@-300V ~-1 pA Trieste, 11-09-2015L.Vitale - 8th VXD Workshop12
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To do list At Later in November we will came back with our colleagues from Elettra Sincr. to test the new readout Need to verify the Ethernet connections through the swichboard Integration on EPICS would be desirable, two options: – Full integration (controls, readout) – Partial integration (labview local control, readout shared with EPICS/LabView) Already agreed, but nevertheless important: Need remember to allocate space on the rack (agreed with Peter) PIN diode close by: agreed with Peter and Minakshi Trieste, 11-09-2015L.Vitale - 8th VXD Workshop13
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New readout Trieste, 11-09-2015L.Vitale - 8th VXD Workshop14
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Backup slides Trieste, 11-09-2015L.Vitale - 8th VXD Workshop15
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Readout Electronics: specs Trieste, 11-09-2015L.Vitale - 8th VXD Workshop16 For each of the 4 input channels (diamond sensors) Individual HV supply Effective bandwidth: 100 kHz (matched to 1 revolution = 10 μs) Selectable current range: 0-50 μA or 0-2 mA 16 (24) - bit ADC; over-sampling possible with freq > 100 kHz 4 circular data buffers, updated every 10 μs: “Raw data” and 3 levels of "sliding sums” over programmable numbers of cycles digital filtering levels and time responses, from "immediate" (10 us) to "very slow" (typically 1 s) 4 levels of abort signals from the comparison of raw data and sliding sums with the programmable thresholds, selected according to a “SuperKEKB Status Register” Approach similar to FermiLab Beam Loss Monitor (BLM) and CERN LHC BLM systems Specifications discussed within Belle II and with SuperKEKB In collaboration with G.Cautero, D.Giuressi, and R.H.Menk from Elettra - Sincrotrone Trieste S.C.p.A.
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VXD Radiation Monitor + Beam Abort Trieste, 11-09-2015L.Vitale - 8th VXD Workshop17 … (5 boxes) 4 diamond sensors HV and signal 4 diamond sensors HV and signal Ethernet/EPICS Abort signals (daisy-chained) Abort From SuperKEKB 100 kHz clock, Abort Reference Timing confirmation LER, HER Abort to SuperKEKB Box #1 Box #2 Box #5 4 diamond sensors HV and signal
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Rad.Mon+Abort, 4-channel module 3 Sums 4 Abort Levels Circular Buffers Ethernet I/O Ext. Clock (100 kHz) Abort reference timing from SuperKEKB TimingControlAbortHV SuperKEKB status Thresholds etc. (for each input channel) From 4 diamond sensors to 4 sensors to SuperKEKB ADC FPGA L.Vitale - 8th VXD WorkshopTrieste, 11-09-201518
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Design and implementation plan Trieste, 11-09-2015L.Vitale - 8th VXD Workshop19 Read and write the external RAM memory using the FPGA Design and prototypes of the ADC’s and DAC’s boards Design and prototype board with two Ether-W-ease VerilogHDL program for the FPGA Synchronization, buffers, running sums, thresholds, abort logics DE3/FPGA Ether-W- ease ADCs DACs Input currents HV outputs Ethernet I/O SuperKEKB timing Abort signals
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RadMon & Beam Abort prototype Trieste, 11-09-2015L.Vitale - 8th VXD Workshop20 F.Vulpone, thesis with G.Cautero et al. (Elettra) Analog front end: pico-ammeters Transimpedence amplifiers ADC LTC2208 16 bits, 130 MHz 2 selectable current ranges Digital section: FPGA STRATICS III (running averages, abort thresholds, timing&control) External RAM and Ethernet interfaces LabView control/readout: Several tests performed Ethernet RAM
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Prototype: initial measurements Front-end bandwidth: within specs – 50 μA range: B = 100,9 kHz – 2 mA range: B = 97,2 kHz Noise, first measurements – Average over 10 μs: σ = 20 μV – Larger than theoretical (σ = 5 μV) – Some coupling with external sources Beam Abort delay – Measured FPGA decision delay – Delay = 7 μs after input spike Trieste, 11-09-2015L.Vitale - 8th VXD Workshop21 7 μs 1 μV 1 μs
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New design of shorter diamond package Trieste, 11-09-2015L.Vitale - 8th VXD Workshop22 The design was sent to Tscharlie to see if it fits the available space. The important point for him is that outside the diameter 47mm nothing must disturb the PXD, and it doesn’t. Then the easiest - he proposes - is to press cable and diamond package on the beampipe with a M1.4 screw. Next slides two sketches from Tscharlie with 2D and 3D processing for the cable channel of support on the Beampipe.
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Sketch a possible 2D processing for the cable channel of support on the Beampipe. Trieste, 11-09-2015L.Vitale - 8th VXD Workshop23
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Sketch with a 3D processing (more elegant and safer for the cable) Trieste, 11-09-2015L.Vitale - 8th VXD Workshop24
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