1. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Work Package 1: Pixel detector systems for particle tracking (and imaging) Timo Tick

2. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Background Technical Training Dissemination Impact Outline

3. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Nationality: Finnish Age:31 Education:D. Sc. University of Oulu, Finland (Microelectronics engineering) Work experience:7 years of work experience in various government, EC and privately funded research projects in Finland Field of expertise: Electronics materials and packaging Background

4. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Study and develop large area tiling solutions and techniques for silicon pixel detectors Work is divided into three sub projects: Through Silicon Via (TSV) process development with ACEOLE partner VTT Low cost wafer bumping and flip chip bonding development Medipix photon detector prototype project Technical - Overview of the work

5. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 TSV is an electrical contact between the front (active) side and the back side of a silicon chip The use of TSV’s will allow large area seamless tiling of pixel detector chips Joint development project with ACEOLE partner VTT Goal: Develop TSV process suitable for HEP detector chips CERN contribution Provide specifications and material information of our chips Co-design the process plan with VTT experts Test chip design Technical - Through Silicon Via (TSV) process development

6. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Hybrid pixel detector consists of: Read Out Chip (ROC) Sensor Chip (SC) Every pixel of the SC is connected to corresponding read out circuitry on ROC with micro solder bumps (~ 20 µm) Flip Chip (FC) bonding Current bump fabrication (electroplating) technology is too expensive Bonding of 1 m² detector area costs 1-2 MCHF The fractional costs of ROC : SC : FC-process are 1:2:7 Goal of the project is to identify and evaluate low cost techniques for wafer bumping and FC bonding Identifying potential industrial partners/suppliers – creating a supply network Evaluating their processes/equipment Technical - Low cost wafer bumping and flip chip bonding PacTech

7. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Goal of the project is to build a general purpose Hybrid Photon Detector (HPD) prototype that Uses Timepix chips Combines the technologies of MCP-PMT’s (Photon Multiplier Tube) and HPD’s → MCP-HPD Can be used to evaluate the performance of such a detector Uses processes and technology that allows tiling of large areas with high sensing area fraction are compatible with the image intensifier industry manufacturing lines Potential applications Cherenkov ring imaging Wave front sensor for adaptive optics Challenges Vacuum compatibility of materials and processes Thermal management Medipix photon detector prototype project Photonis

8. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Formal training Safety and clean room work training at VTT Equipment and process training at VTT (Finland), Smart Equipment Technology (France) Professional development courses: Flip chip fabrication and interconnection Ultrahigh thermal conductivity packaging materials Informal training Pixel detector and pixel detector electronics training from colleagues in CERN pixel team Vacuum technology, materials and brazing training from experts of CERN, Medipix partner institutes and various suppliers Interconnection techniques training from CERN and VTT colleagues CAD software and thermal simulation training from colleagues at CERN CERN lectures seminars and courses Detector and electronics seminars French lessons Training

9. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Secondments to VTT, Espoo Secondment divided to multiple 1-2 week visits Currently 4 visits done (26 working days at VTT) Visits to companies Diamond materials, Germany Smart Equipment Technologies (SET), France CEA-LETI, France Conferences Electronics Components and Technology Conference (ECTC2009) Topical Workshop for Electronics in Particle Physics (TWEPP 2010) Off-site training (Thanks to the ACEOLE training budget)

10. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Presentations in: Medipix collaboration meetings LHCb VELO upgrade meeting At VTT, Espoo ACEOLE review meetings … and numerous internal meetings Papers: TWEPP 2010, Mechanical and thermal design of the Medipix photon detector TWEPP 2010, Low-cost bump bonding activities at CERN (Co-author) Doctoral thesis: Fabrication of advanced LTCC structures for microwave devices Dissemination

11. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 For the community: Promising results form low cost bumping work, that may lead to significant cost savings in pixel detector manufacturing Kick started the Through Silicon Via (TSV) process development at VTT and they are making good progress Contributed to the planning of the Medipix photon detector – the project got funded and work is ongoing For me: Very good introduction to the world of particle physics and particularly to pixel detector technology I have gained knowledge of chip and wafer level packaging and interconnection techniques I have had opportunities to work with the technological experts from CERN, our industry partners and our suppliers Impact of my work so far

12. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Thank you for your attention!